AD8328 Analog Devices, AD8328 Datasheet

no-image

AD8328

Manufacturer Part Number
AD8328
Description
5 V Upstream Cable Line Driver
Manufacturer
Analog Devices
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD8328ARQ
Quantity:
1 416
Part Number:
AD8328ARQ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD8328ARQ-REEL
Manufacturer:
QUALCOMM
Quantity:
9 872
Part Number:
AD8328ARQ-REEL
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD8328ARQZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
FEATURES
Supports DOCSIS and EuroDOCSIS standards for reverse
Gain programmable in 1 dB steps over a 59 dB range
Low distortion at 60 dBmV output
Output noise level @ minimum gain 1.2 nV/√Hz
Maintains 300 Ω output impedance Tx-enable and
Upper bandwidth: 107 MHz (full gain range)
5 V supply operation
Supports SPI interfaces
APPLICATIONS
DOCSIS and EuroDOCSIS cable modems
CATV set-top boxes
CATV telephony modems
Coaxial and twisted pair line drivers
GENERAL DESCRIPTION
The AD8328
driving. The features and specifications make the AD8328
ideally suited for MCNS-DOCSIS and EuroDOCSIS applications.
The gain of the AD8328 is digitally controlled. An 8-bit serial
word determines the desired output gain over a 59 dB range,
resulting in gain changes of 1 dB/LSB.
The AD8328 accepts a differential or single-ended input signal.
The output is specified for driving a 75 Ω load through a 2:1
transformer.
Distortion performance of −53 dBc is achieved with an output
level up to 60 dBmV at 65 MHz bandwidth over a wide
temperature range.
This device has a sleep mode function that reduces the quiescent
current to 2.6 mA and a full power-down function that reduces
power-down current to 20 μA.
The AD8328 is packaged in a low cost 20-lead LFCSP and
a 20-lead QSOP. The AD8328 operates from a single 5 V supply
and has an operational temperature range of −40°C to +85°C.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
path transmission systems
−57.5 dBc SFDR at 21 MHz
−54 dBc SFDR at 65 MHz
Tx-disable condition
1
is a low cost amplifier designed for coaxial line
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
V
1
V
IN+
IN–
Patent pending.
–50
–52
–54
–56
–58
–60
–62
–64
–66
–68
–70
GND
Z
Z
DIFF
OR
SINGLE
INPUT
AMP
IN
IN
5
(SINGLE) = 800Ω
(DIFF) = 1.6kΩ
Figure 2. Worst Harmonic Distortion vs. Frequency
FUNCTIONAL BLOCK DIAGRAM
V
@ MAX GAIN,
THIRD HARMONIC
DATEN
OUT
15
= 60dBmV
VERNIER
SDATA CLK
© 2005 Analog Devices, Inc. All rights reserved.
V
@ MAX GAIN,
SECOND HARMONIC
OUT
25
FREQUENCY (MHz)
Cable Line Driver
AD8328
Figure 1.
= 60dBmV
ATTENUATION
DATA LATCH
REGISTER
DECODE
35
SHIFT
CORE
5 V Upstream
8
8
8
45
BYP
TXEN
POWER-DOWN
POWER
AD8328
AMP
LOGIC
www.analog.com
Z
300Ω
55
OUT
SLEEP
DIFF =
65
V
V
RAMP
OUT+
OUT–

Related parts for AD8328

AD8328 Summary of contents

Page 1

... The AD8328 is packaged in a low cost 20-lead LFCSP and a 20-lead QSOP. The AD8328 operates from a single 5 V supply and has an operational temperature range of −40°C to +85°C. Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use ...

Page 2

... Evaluation Board Features and Operation.............................. 12 Differential Signal Source ......................................................... 13 Differential Signal from Single-Ended Source ....................... 13 Single-Ended Source.................................................................. 13 Overshoot on PC Printer Ports ................................................ 13 Installing Visual Basic Control Software................................. 13 Running AD8328 Software ....................................................... 14 Controlling Gain/Attenuation of the AD8328 ....................... 14 Transmit Enable and Sleep Mode............................................. 14 Memory Functions..................................................................... 14 Outline Dimensions ....................................................................... 17 Ordering Guide............................................................................... 18 Rev Page ...

Page 3

... SPECIFICATIONS T = 25° Ω, V (differential dBmV. The AD8328 is characterized using a 2:1 transformer Table 1. Parameter INPUT CHARACTERISTICS Specified AC Voltage Input Resistance Input Capacitance GAIN CONTROL INTERFACE Voltage Gain Range Maximum Gain Minimum Gain Output Step Size Output Step Size Temperature Coefficient OUTPUT CHARACTERISTICS Bandwidth (− ...

Page 4

... AD8328 1 TOKO 458 PT-1087 used for above specifications. Typical insertion loss of 0 MHz. 2 Guaranteed by design and characterization to ±4 sigma for T 3 Measured through a 2:1 transformer. 4 Specification is worst case over all gain codes. 5 Guaranteed by design and characterization to ±3 sigma for dBmV, QPSK modulation, 160 kSPS symbol rate. ...

Page 5

... CLOCK CYCLES DATEN GAIN TRANSFER (G1) TXEN t GS ANALOG OUTPUT SIGNAL AMPLITUDE (p-p) Figure 3. Serial Interface Timing VALID DATA BIT SDATA MSB MSB CLK Figure 4. SDATA Timing Rev Page VALID DATA-WORD G2 GAIN TRANSFER (G2) t OFF t ON MSB AD8328 ...

Page 6

... AD8328 ABSOLUTE MAXIMUM RATINGS Table 4. Parameter Supply Voltage V CC Input Voltage IN+ IN− DATEN, SDATA, CLK, SLEEP, TXEN Internal Power Dissipation QSOP (θ = 83.2°C/ LFCSP (θ = 30.4°C/W) JA Operating Temperature Range Storage Temperature Range Lead Temperature, Soldering 60 sec 1 Thermal resistance measured on SEMI standard 4-layer board. ...

Page 7

... A Logic 0-to-Logic 1 transition latches the data bit, and a Logic 1-to-Logic 0 transfers the data bit to the slave. This requires the input serial data-word to be valid at or before this clock transition SLEEP Low Power Sleep Mode. In the sleep mode, the AD8328’s supply current is reduced to 20 μA. A Logic 0 powers down the part (high Connect ...

Page 8

... AD8328 TYPICAL PERFORMANCE CHARACTERISTICS –55 – 60dBmV OUT V = 61dBmV OUT @ MAX GAIN @ MAX GAIN –65 – 59dBmV OUT @ MAX GAIN – FREQUENCY (MHz) Figure 7. Second-Order Harmonic Distortion vs. Frequency for Various Output Powers – 60dBmV OUT @ MAX GAIN – –40°C A – ...

Page 9

... Rev Page AD8328 = 29dBmV IN MAX GAIN MIN GAIN 10 100 FREQUENCY (MHz 10MHz f = 5MHz f = 42MHz f = 65MHz GAIN CONTROL (Decimal Code) Figure 17. Gain Error vs. Gain Control ...

Page 10

... OUTPUT BIAS, IMPEDANCE, AND TERMINATION The output stage of the AD8328 requires a bias The 5 V power supply should be connected to the center tap of the output transformer. In addition, the V tap of the transformer should be decoupled as seen in Figure 20. ...

Page 11

... The differential input and output traces should be kept as short as possible. Keeping the traces short minimizes parasitic capacitance and inductance. This is most critical between the outputs of the AD8328 and the 2:1 output transformer also critical that all differential signal paths be symmetrical in length and width. In addition, the input and output traces should be adequately spaced to minimize coupling (crosstalk) through the board ...

Page 12

... AD8328 upstream cable driver via the parallel port of a PC. A standard printer cable connected to the parallel port of the PC is used to feed all the necessary data to the AD8328 using the Windows®-based control software. This package provides a means of controlling the gain and the power mode of the AD8328 ...

Page 13

... SINGLE-ENDED SOURCE Although the AD8328 was designed to have optimal DOCSIS performance when used with a differential input signal, the AD8328 can also be used as a single-ended receiver digitally controlled amplifier. However, as with the single- ended-to-differential configuration previously noted, even- order harmonic distortion is slightly degraded. ...

Page 14

... Figure 25. Control Software Interface TRANSMIT ENABLE AND SLEEP MODE The Transmit Enable and Transmit Disable buttons select the mode of operation of the AD8328 by asserting logic levels on the asynchronous TXEN pin. The Transmit Disable button applies Logic 0 to the TXEN pin, disabling forward transmission. ...

Page 15

... IN– OUT– GND BYP 8 C12 0.1µF 13 DATEN SDATA SLEEP 10 11 CLK GND AD8328 QSOP AGND1 Figure 26. AD8328 Evaluation Board Schematic Rev Page AD8328 10µF TOKO R15 CABLE_OA 458PT-1087 0Ω R16 C13 0.1µ ...

Page 16

... AD8328 Figure 27. Primary Side Figure 28. Component Side Silkscreen Figure 29. Internal Power Plane Figure 30. Internal Ground Plane Figure 31. Secondary Side Figure 32. Secondary Side Silkscreen Rev Page ...

Page 17

... SEATING 0.004 BSC 0.008 PLANE 0.004 COMPLIANT TO JEDEC STANDARDS MO-137-AD Figure 34. 20-Lead Shrink Small Outline Package [QSOP] (RQ-20) Dimensions shown in inches Rev Page 0.60 MAX PIN 1 INDICATOR 2.25 2. 0.25 MIN 0.30 0.23 0.18 0.244 0.236 0.228 8° 0° 0.050 0.010 0.016 0.006 AD8328 ...

Page 18

... AD8328ACP –40°C to +85°C AD8328ACP-REEL –40°C to +85°C AD8328ACP-REEL7 –40°C to +85°C AD8328ACPZ 1 –40°C to +85°C 1 AD8328ACPZ-REEL –40°C to +85°C AD8328ACPZ-REEL7 1 –40°C to +85°C AD8328ACP-EVAL AD8328ARQ-EVAL Pb-free part. Package Description 20-Lead QSOP ...

Page 19

... NOTES Rev Page AD8328 ...

Page 20

... AD8328 NOTES © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C03158–0–10/05(A) Rev Page ...

Related keywords