ADC101S101EVAL National Semiconductor, ADC101S101EVAL Datasheet
ADC101S101EVAL
Specifications of ADC101S101EVAL
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ADC101S101EVAL Summary of contents
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... ADC101S021 8-bit ADC081S021 Connection Diagram Ordering Information Order Code ADC101S101CISD ADC101S101CISDX ADC101S101CIMF ADC101S101CIMFX ADC101S101EVAL TRI-STATE ® registered trademark of National Semiconductor Corporation. © 2010 National Semiconductor Corporation ADC101S101 Features ■ Specified over a range of sample rates. ■ 6-lead LLP and SOT-23 packages ■ ...
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Block Diagram Pin Descriptions and Equivalent Circuits Pin No. Symbol ANALOG I/O V Analog input. This signal can range from DIGITAL I/O 4 SCLK Digital clock input. This clock directly controls the conversion and readout ...
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... Absolute Maximum Ratings 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Analog Supply Voltage V A Voltage on Any Pin to GND Input Current at Any Pin (Note 3) Package Input Current (Note 3) Power Consumption 25°C ...
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Symbol Parameter ANALOG INPUT CHARACTERISTICS V Input Range Leakage Current DCL C Input Capacitance INA DIGITAL INPUT CHARACTERISTICS V Input High Voltage IH V Input Low Voltage IL I Input Current IN C Digital Input Capacitance IND ...
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Symbol Parameter Minimum Time Required for t ACQ Acquisition t (Note 11) QUIET t Aperture Delay AD t Aperture Jitter AJ ADC101S101 Timing Specifications The following specifications apply for 500 ksps to 1 Msps, Boldface limits apply ...
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Timing Diagrams www.national.com FIGURE 1. Timing Test Circuit FIGURE 2. ADC101S101 Serial Timing Diagram 6 20145208 20145206 ...
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Specification Definitions ACQUISITION TIME is the time required to acquire the input voltage. That is time required for the hold capacitor to charge up to the input voltage. Acquisition time is measured backwards from the falling edge of ...
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Typical Performance Characteristics MHz to 20 MHz 100 kHz unless otherwise stated. SCLK IN DNL MHz SCLK DNL MHz SCLK DNL vs Clock Frequency www.national.com T = +25°C, f ...
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SNR vs Clock Frequency 20145263 SFDR vs. Clock Frequency 20145267 Spectral Response 5.25V MHz SCLK 20145269 SINAD vs. Clock Frequency THD vs. Clock Frequency Spectral Response MHz SCLK 9 20145264 ...
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Power Consumption vs. Throughput MHz SCLK www.national.com 20145255 10 ...
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Applications Information 1.0 ADC101S101 OPERATION The ADC101S101 is a successive-approximation analog-to- digital converter designed around a charge-redistribution dig- ital-to-analog converter core. Simplified schematics of the ADC101S101 in both track and hold operation are shown in Figures 3 and 4, respectively. ...
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... Figure 2 yields a 20μs time between CS falling 4.0 TYPICAL APPLICATION CIRCUIT A typical application of the ADC is shown in is provided in this example by the National Semiconductor LP2950 low-dropout voltage regulator, available in a variety of fixed and adjustable output voltages. The power supply pin is bypassed with a capacitor network located close to the ADC ...
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ANALOG INPUTS An equivalent circuit for one of the ADC's input channels is shown in Figure 7. Diodes D1 and D2 provide ESD protection for the analog inputs time should any input go beyond (V + 300 ...
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To exit shutdown mode, bring CS back low. Upon bringing CS low, the ADC will begin powering up (power-up time is specified in the Timing Specifications table). This power-up delay results in the first conversion result being unusable. The second ...
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Physical Dimensions inches (millimeters) unless otherwise noted Order Number ADC101S101CISD or ADC101S101CISDX Order Number ADC101S101CIMF, ADC101S101CIMFX 6-Lead LLP NS Package Number SDB06A 6-Lead SOT-23 NS Package Number MF06A 15 www.national.com ...
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