ds90cf363 National Semiconductor Corporation, ds90cf363 Datasheet

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ds90cf363

Manufacturer Part Number
ds90cf363
Description
+3.3v Lvds Transmitter 18-bit Flat Panel Display Fpd Link?65 Mhz
Manufacturer
National Semiconductor Corporation
Datasheet

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© 2000 National Semiconductor Corporation
DS90CF363
+3.3V LVDS Transmitter 18-Bit Flat Panel Display (FPD)
Link— 65 MHz
General Description
The DS90CF363 transmitter converts 21 bits of CMOS/TTL
data into three LVDS (Low Voltage Differential Signaling)
data streams. A phase-locked transmit clock is transmitted in
parallel with the data streams over a fourth LVDS link. Every
cycle of the transmit clock 21 bits of input data are sampled
and transmitted. At a transmit clock frequency of 65 MHz, 18
bits of RGB data and 3 bits of LCD timing and control data
(FPLINE, FPFRAME, DRDY) are transmitted at a rate of 455
Mbps per LVDS data channel. Using a 65 MHz clock, the
data throughputs is 170 Mbytes/sec.
This chipset is an ideal means to solve EMI and cable size
problems associated with wide, high speed TTL interfaces.
Block Diagram
TRI-STATE
®
is a registered trademark of National Semiconductor Corporation.
DS100032
See NS Package Number MTD48
Order Number DS90CF363MTD
DS90CF363
Features
n 20 to 65 MHz shift clock support
n Single 3.3V supply
n Chipset (Tx + Rx) power consumption
n Power-down mode (
n Single pixel per clock XGA (1024x768) ready
n Supports VGA, SVGA, XGA and higher addressability.
n Up to 170 Megabytes/sec bandwidth
n Up to 1.3 Gbps throughput
n Narrow bus reduces cable size and cost
n 290 mV swing LVDS devices for low EMI
n PLL requires no external components
n Low profile 48-lead TSSOP package
n Falling edge data strobe Transmitter
n Compatible with TIA/EIA-644 LVDS standard
n ESD rating
n Operating Temperature: −40˚C to +85˚C
>
7 kV
<
DS100032-1
0.5 mW total)
<
250 mW (typ)
January 2000
www.national.com

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ds90cf363 Summary of contents

Page 1

... LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link— 65 MHz General Description The DS90CF363 transmitter converts 21 bits of CMOS/TTL data into three LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fourth LVDS link. Every cycle of the transmit clock 21 bits of input data are sampled and transmitted ...

Page 2

... Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the device should be operated at these limits. The tables of “Electrical Characteristics” specify conditions for device operation. www.national.com (Note 1) Package Derating: DS90CF363 ESD Rating (HBM, 1 100 pF) Recommended Operating −0. ...

Page 3

Electrical Characteristics Note 2: Typical values are given for V = 3.3V and T CC Note 3: Current into device pins is defined as positive. Current out of device pins is defined as negative. Voltages are referenced to ground unless ...

Page 4

... Note 7: Figures 1, 2 show a falling edge data strobe (TxCLK IN/RxCLK OUT). Note 8: Recommended pin to signal mapping. Customer may choose to define differently. FIGURE 3. DS90CF363 (Transmitter) LVDS Output Load and Transition Times FIGURE 4. DS90CF363 (Transmitter) Input Clock Transition Time www.national.com ...

Page 5

... TCCS measured between earliest and latest LVDS edges TxCLK Differential Low High Edge FIGURE 5. DS90CF363 (Transmitter) Channel-to-Channel Skew FIGURE 6. DS90CF363 (Transmitter) Setup/Hold and High/Low Times FIGURE 7. DS90CF363 (Transmitter) Clock In to Clock Out Delay FIGURE 8. DS90CF363 (Transmitter) Phase Lock Loop Set Time DS100032-9 DS100032-10 DS100032-12 ...

Page 6

AC Timing Diagrams (Continued) FIGURE 9. Seven Bits of LVDS in One Clock Cycle FIGURE 10. 21 Parallel TTL Data Inputs Mapped to LVDS Outputs www.national.com FIGURE 11. Transmitter Power Down Delay 6 DS100032-16 DS100032-17 DS100032-18 ...

Page 7

... Description and receiver devices. This change may enable the re- moval supply from the system, and power may be supplied from an existing 3V power source. 2. The DS90CF363 transmitter input and control inputs ac- cept 3.3V TTL/CMOS levels. They are not 5V tolerant. 7 DS100032-20 www.national.com ...

Page 8

... Pin Diagram www.national.com DS90CF363 DS100032-23 Application 8 DS100032-3 ...

Page 9

... Italiano National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. Order Number DS90CF363MTD NS Package Number MTD48 2. A critical component is any component of a life ...

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