hip1012a Intersil Corporation, hip1012a Datasheet
hip1012a
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hip1012a Summary of contents
Page 1
... Data Sheet Dual Power Distribution Controller The HIP1012A is a HOT SWAP dual supply power distribution controller. Two external N-Channel MOSFETs are driven to distribute power while providing load fault isolation. At turn-on, the gate of each external N-Channel MOSFET is charged with a 10µA current source. Capacitors on each gate (see the Typical Application Diagram), create a programmable ramp (soft turn-on) to control inrush currents ...
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... ENABLE PWRON1 RISING EDGE RESET 12V PWRON2 ENABLE 3X 12V FALLING + - EDGE 10µA DELAY CLIM 2R 5VG - + OC R 5VS HIP1012A R SENSE TO LOAD 12ISEN 12V 100µA R ILIM R ILIM POR GND QPUMP 12V PUMP C PUMP 10µA C TIM C TIM + - + OC LATCH ...
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... Resistor 14 3V/12VISEN 3.3V/12V Current Sense 3 HIP1012A Connect to source of associated external N-Channel MOSFET switch to sense output voltage. Connect to the gate of associated N-Channel MOSFET switch. A capacitor from this node to ground sets the turn-on ramp. At turn-on this capacitor will be charged to 17. 10µA current source when in 5v/12V mode of operation, otherwise capacitor will be charged to 11.4V. A small resistor (10 - 200Ω ...
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... Current Limit Response Time (Current within 10% of Regulated Value) ±1% Current Limit Response Time (Current within 1% of Regulated Value) Response Time To Dead Short Gate Turn-On Time 4 HIP1012A Thermal Information Thermal Resistance (Typical, Note 1) SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . + 0.3V Maximum Junction Temperature (Plastic Package 150°C DD Maximum Storage Temperature Range . . . . . . . . . . . -65° ...
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... The HIP1012A is a multifeatured dual power supply distribution controller, including programmable current limiting regulation and time to latch off. Additionally the HIP1012A operates both as a +3.3V and +5V and +12V power supply controller with each mode having appropriate UnderVoltage (UV) fault notification levels. ...
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... See Simplified Block Diagram on page 2 for OC latch off circuit suggestion. The HIP1012A is reset by a rising edge on either PWRON pin and is turned on by either PWRON pin being driven low. The HIP1012A can control either +12V/5V or +3.3V/+5V supplies. ...
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... TEMPERATURE (°C) FIGURE 2. SUPPLY CURRENT 10.7 10.6 10.5 10.4 10.3 -40 -30 -20 - TEMPERATURE (°C) FIGURE 4. C CURRENT SOURCE TIM 11.00 10.98 10.96 10.94 -40 - TEMPERATURE (°C) FIGURE 6. 12V UV THRESHOLD 7 HIP1012A 105 104 103 102 -40 2.04 2.02 2.00 1.98 1.96 1. -40 4.615 4.610 4.605 4.600 4.595 - ...
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... VG 17.28 17.26 -40 - TEMPERATURE (°C) FIGURE 8. 12V, 3/5V GATE DRIVE 54 Vth 54.0 53 Vth 53.0 52.5 -40 - TEMPERATURE (°C) FIGURE 10. OC VOLTAGE THRESHOLD WITH R 8 HIP1012A (Continued) 11.935 17.6 11.930 17.4 11.925 17.2 11.920 11.915 17.0 11.910 16.8 11.905 16.6 11.900 60 80 102.5 102.0 101.5 101.0 100 5kΩ ...
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... LOAD sections are first connected together and then the GENERIC board is connected onto the BUS board. For an active backplane or for the HIP1012A on an interposer board configuration, the BUS and GENERIC sections are first connected together and then the load board is connected onto the GENERIC board ...
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... CEC1 3 /12VIN GND GND JP1 0.1µ 20Ω NOTE: Test point number equals HIP1012A pin number. CEF SW13 CEF 1,2,3 R102 SW14 LED2 CEF 4,5,6, 7,8,10 SW11 CEF 9,11, 12 R103 SW12 LED3 LOAD BOARD 10 HIP1012A 20mΩ JP2 20Ω ...
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FIGURE 14. HIP1012EVAL1 EVAL BOARD ...
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... TABLE 5. HIP1012EVAL1 BOARD COMPONENT LISTING COMPONENT DESIGNATOR COMPONENT NAME GENERIC BOARD U1 HIP1012CB or HIP1012ACB Q1, Q2 RF1K49156, Si4404DY QxB and QxC NOT POPULATED R 5V Sense Resistor 1 R 3.3V/12V Sense Resistor Loop compensation Resistors Current Limit Set Resistor 5 R* Isolation resistor (not provided, see Decoupling ...
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... Data Line Considerations The HIP1012A does not integrate data bus line switches, although control of the data bus can be assisted by the time- out feature of the HIP1012A. During the time-out period, the ) is 20mΩ and 2 operating system software can determine whether to halt I/O activity to a disk drive which is undergoing an under-voltage or over-current fault as indicated by the status of PGOOD ...
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... V DD 12VG CTIM PWRON1 PWRON2 PGOOD 5VG GND 20Ω 0.01µF RF1K49157 Q1 FIGURE 15. HIP1012 EVALUATION CIRCUIT SCHEMATIC AND PHOTO FOR DISK DRIVE HOT PLUG 14 HIP1012A R 2 0.020Ω RF1K49157 R , 20Ω 0.01µ 0.1µ HIP1012 1 14 ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 15 HIP1012A M14.15 (JEDEC MS-012-AB ISSUE C) 14 LEAD NARROW BODY SMALL OUTLINE PLASTIC ...