isl6217a Intersil Corporation, isl6217a Datasheet
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isl6217a
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isl6217a Summary of contents
Page 1
... CORE voltage regulation. To improve efficiency at light loading, the ISL6217A can be configured to run in single phase PWM in ACTIVE, DEEP or DEEPER SLEEP modes of operation. Also, in deep and deeper sleep modes the ISL6217A will operate in diode emulation ...
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... ISL6217ACVZA - TSSOP (Pb-free) ISL6217ACVZA TSSOP Tape and Reel (Pb-free) NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil ...
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... GATE DRIVER UGATE Source Resistance 500mA Source Current UGATE Source Current V UGATE-PHASE = 2.5V 3 ISL6217A Thermal Information Thermal Resistance (Typical, Note 1) TSSOP Package (Note Maximum Operating Junction Temperature 125°C Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C Maximum Lead Temperature (Soldering 10s 300°C = -10° ...
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... Delay Time from LGATE Falling to VDDP = 5V, BOOT to PHASE = 5V, UGATE - PHASE = 2.5V, UGATE Rising LGATE = 2.5V Delay Time from UGATE Falling to VDDP = 5V, BOOT to PHASE = 5V, UGATE - PHASE = 2.5V, LGATE Rising LGATE = 2.5V 4 ISL6217A = -10°C to 85°C, Unless Otherwise Specified (Continued) A TEST CONDITIONS MIN TYP MAX UNITS Ω ...
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... COMP - This pin provides connection to the error amplifier output. 5 ISL6217A FB - This pin is connected to the inverting input of the error amplifier. SOFT - This pin programs the slew rate of VID changes, Deep Sleep and Deeper Sleep transitions and Soft-Start after initializing. This pin is connected to ground via a capacitor, and to EA+ through an external “ ...
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... CLOCK CYCLE DACOUT V SOFT SOFT SOFT START EA+ VID0 VID1 VID2 VID VID3 D/A VID4 VID5 COMP FB 1.75V OCSET + STV DSV MUX DRSV V CORE REF DSEN# DRSEN 6 ISL6217A PGOOD EN VDD 1.3V POWER- RESET(POR) CONTROL CLOCK AND AND SAWTOOTH GENERATOR + Σ Σ PWM1 PWM2 + E/A - CHANNEL ...
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... FIGURE 1. TYPICAL APPLICATION CIRCUIT FOR ISL6217A MULTIPHASE PWM CONTROLLER 7 ISL6217A the PWRCH pin. The ISL6217A can be configured for two channel operation in “Active” mode and one channel operation in “Deep” and “Deeper Sleep” modes through logic connections to the PWRCH pin. The following configuration uses two channel operation in “ ...
Page 8
... The system signal, VR_ON is directly connected to the EN pin of the ISL6217A. Once the voltage on the EN pin rises above 2.0V, the chip is enabled and soft-start begins. The EN pin of the ISL6217A is also used to reset the ISL6217A, for cases when an undervoltage or overcurrent fault condition has latched the IC off. A toggling of the state of this pin to a level below 1 ...
Page 9
... SlewRate 10 mV Gate-Drive Signals The ISL6217A provides internal gate-drive for a two channel, Synchronous Buck, Core Regulator. During two channel mode of operation, the PWM drive signals are switched 180° out of phase to reduce ripple current delivered from the DC rail and to the load. ...
Page 10
... ISL6217A TABLE 1. IMPV-IV VID CODES (Continued) VID0 V DAC VID5 VID4 0 1.708 1.692 1.676 1.660 1.644 1.628 1.612 ...
Page 11
... IMVP-IV+™ specifications for Active, Deep Sleep, and Deeper Sleep Modes of Operation. After initial Start-up, a logic high signal on DSEN# and a logic low signal on DRSEN signals the ISL6217A to operate in Active mode. Refer to Table 2. This mode will recognize VID code changes and regulate the output voltage to these command voltages ...
Page 12
... STV pin will be the voltage the controller will regulate to during the start-up sequence. Once the PGOOD pin of the ISL6217A controller is externally enabled high by the Vccp and Vcc_mch controllers, the ISL6217A will then ramp, after a 10µs delay, to the voltage commanded by the VID setting minus “Droop” 1.75V ...
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... Typically, this number is between 150% and 200% of the maximum operating current of the application. For example, if the max operating current is 46A, and the user chooses 150% overcurrent, the ISL6217A will shut down if the output current exceeds 46A*1.5 or 69A. According to the Block Diagram, the equation below should be used to determine ...
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... IMVP-IV_ C SOFT IMVP-IV+_ REFERENCE ISL6217A FIGURE 9. SIMPLIFIED BLOCK DIAGRAM OF THE ISL6217A VOLTAGE AND CURRENT CONTROL LOOPS FOR A TWO CHANNEL REGULATOR Battery Feed-Forward Compensation - VBAT The ISL6217A incorporates Battery Voltage Feed-Forward Compensation, as shown in Figure 8. This compensation provides a constant Pulse Width Modulator Gain independent of battery voltage ...
Page 15
... PGOOD functions for each supply. Once these two supplies are within regulation, PGOOD Vccp and PGOOD Vcc_mch will be high impedance, and will allow the PGOOD of the ISL6217A to sink approximately 2.6mA to ground through the internal MOSFET, shown in Figure 10. The ISL6217A detects this current and starts an internal PGOOD timer ...
Page 16
... The selection of this resistor is explained in the following section. Selection of RDROOP Figure 11 shows a static “Droop” load line for the 1.484V Active Mode. The ISL6217A, as previously mentioned, allows the programming of the load line slope by the selection of the RDROOP resistor. (0A,1.506V) (0A,1 ...
Page 17
... Diode Emulation Diode emulation allows for higher converter efficiency under light-load situations. With diode emulation active, the ISL6217A will detect the zero current crossing of the output inductor and turn off LGATE. This ensures that discontinuous conduction mode (DCM) is achieved. In DCM, conduction losses are reduced in the Low-Side MOSFET, consequently boosting efficiency ...
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... MOSFETs body diode. The gate-charge losses are dissipated in the ISL6217A drivers and do not heat the MOSFETs; however, large gate-charge increases the switching time t which increases the upper MOSFET SW, switching losses ...
Page 19
... OUT UPPER V IN Typical Application - 2 Phase Converter Using ISL6217A PWM Controller - 38 Lead TSSOP Figure 14 shows the ISL6217A, Synchronous Buck Converter circuit used to provide the CORE voltage +5VDC 98.8K_1% 1 µ F 0.027µF 243K_1% VDD 1.20K_1% DACOUT DSV FSET PWRCH ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 20 ISL6217A M38.173 38 LEAD THIN SHRINK SMALL OUTLINE PLASTIC PACKAGE M ...