M28W640FCT STMICROELECTRONICS [STMicroelectronics], M28W640FCT Datasheet
M28W640FCT
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M28W640FCT Summary of contents
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... PROGRAM and ERASE SUSPEND 100,000 PROGRAM/ERASE CYCLES per ■ BLOCK ■ ELECTRONIC SIGNATURE – Manufacturer Code: 20h – Top Device Code, M28W640FCT: 8848h – Bottom Device Code, M28W640FCB: 8849h ■ PACKAGES – Compliant with Lead-Free Soldering Processes – Lead-Free Versions April 2005 This is preliminary information on a new product now in development or undergoing evaluation ...
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... M28W640FCT, M28W640FCB TABLE OF CONTENTS FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Figure 1. Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 SUMMARY DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 1. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 3. TSOP Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 4. TFBGA Connections (Top view through package Figure 5. Block Addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 6. Protection Register Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 SIGNAL DESCRIPTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Address Inputs (A0-A21 Data Input/Output (DQ0-DQ15 Chip Enable (E) ...
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... DC and AC PARAMETERS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Table 13. Operating and AC Measurement Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 7. AC Measurement I/O Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 8. AC Measurement Load Circuit Table 14. Capacitance Table 15. DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 9. Read AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Table 16. Read AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 10.Write AC Waveforms, Write Enable Controlled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 17. Write AC Characteristics, Write Enable Controlled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 M28W640FCT, M28W640FCB 3/55 ...
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... PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 22. Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Table 23. Daisy Chain Ordering Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 APPENDIX A.BLOCK ADDRESS TABLES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Table 24. Top Boot Block Addresses, M28W640FCT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Table 25. Bottom Boot Block Addresses, M28W640FCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 APPENDIX B.COMMON FLASH INTERFACE (CFI Table 26. Query Structure Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 27. CFI Query Identification String Table 28 ...
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... The devices feature an asymmetrical blocked ar- chitecture. They have an array of 135 blocks: 8 Parameter Blocks of 4 KWord and 127 Main Blocks of 32 KWord. The M28W640FCT has the Parameter Blocks at the top of the memory ad- dress space while the M28W640FCB locates the Parameter Blocks starting from the bottom. The memory maps are shown in Figure 5 ...
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... M28W640FCT, M28W640FCB Figure 3. TSOP Connections 6/55 A15 1 48 A14 A13 A12 A11 A10 A9 A8 A21 A20 M28W640FCT M28W640FCB A19 A18 A17 AI09904b A16 V DDQ V SS DQ15 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 V DD ...
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... V DDQ A11 A10 W RP A18 A12 A9 A21 A20 DQ11 DQ2 DQ14 DQ5 DQ15 DQ6 DQ12 DQ3 DQ7 DQ13 DQ4 V DD M28W640FCT, M28W640FCB A19 A7 A4 A17 DQ8 E A0 DQ9 DQ0 V SSQ DQ10 DQ1 G AI04380b 7/55 ...
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... M28W640FCT, M28W640FCB Figure 5. Block Addresses M28W640FCT Top Boot Block Addresses 3FFFFF 4 KWords 3FF000 3F8FFF 4 KWords 3F8000 3F7FFF 32 KWords 3F0000 00FFFF 32 KWords 008000 007FFF 32 KWords 000000 Note: Also see APPENDIX A., Tables 24 Figure 6. Protection Register Memory Map 8Ch 85h 84h 81h 80h 8/55 3FFFFF ...
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... Note: Each device in a system should have pacitor close to the pin. See IL surement Load should be sufficient to carry the required V program and erase currents. M28W640FCT, M28W640FCB , the device is in normal IH provides the power DD Supply Voltage. V provides the power DDQ DD or can use a separate supply. ...
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... M28W640FCT, M28W640FCB BUS OPERATIONS There are six standard bus operations that control the device. These are Bus Read, Bus Write, Out- put Disable, Standby, Automatic Standby and Re- set. See Table 2., Bus Operations, for a summary. Typically glitches of less than 5ns on Chip Enable or Write Enable are ignored by the memory and do not affect bus operations ...
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... Two Bus Write cycles are required to issue the command. 6 and 7 for ■ The first bus cycle sets up the Erase command. M28W640FCT, M28W640FCB Command Block Lock confirm Program Erase Block Lock-Down confirm Double Word Program Program Clear Status Register Quadruple Word Program ...
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... M28W640FCT, M28W640FCB ■ The second latches the block address in the internal state machine and starts the Program/ Erase Controller. If the second bus cycle is not Write Erase Confirm (D0h), Status Register bits b4 and b5 are set and the command aborts. Erase aborts if Reset turns to V cannot be guaranteed when the Erase operation is aborted, the block must be erased again ...
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... The lock status can be monitored for each block Figure using the Read Electronic Signature command. Map). Attempting Locked-Down blocks revert to the locked (and not M28W640FCT, M28W640FCB shows the protection status after issuing shows the protection status after issuing . When WP is high, V the Lock-Down ...
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... M28W640FCT, M28W640FCB locked-down) state when the device is reset on power-down. Table 10. shows the protection sta- tus after issuing a Block Lock-Down command. Table 4. Commands Commands 1st Cycle Op. Add Data Read Memory 1+ Write X Array Read Status 1+ Write X Register Read Electronic 1+ Write X Signature Read CFI Query ...
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... OTP data 88h Don't Care OTP data 89h Don't Care OTP data 8Ah Don't Care OTP data 8Bh Don't Care OTP data 8Ch Don't Care OTP data M28W640FCT, M28W640FCB A12-A21 DQ0 DQ1 ( DQ1 DQ2 DQ3-DQ7 DQ8-DQ15 OTP Prot. 0 ...
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... Main Block Program Parameter Block Program Main Block Erase Parameter Block Erase Program/Erase Cycles (per Block) Note: 1. Typical time to program a Main or Parameter Block using the Double Word Program and the Quadruple Word Program commands respectively. 16/55 M28W640FCT, M28W640FCB Test Conditions Min 12V ± ...
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... BLOCK LOCKING The M28W640FCT and M28W640FCB feature an instant, individual block locking scheme that al- lows any block to be locked or unlocked with no la- tency. This locking scheme has three levels of protection. ■ Lock/Unlock - this first level allows software- only control of block locking. Lock-Down - this second level requires ■ ...
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... M28W640FCT, M28W640FCB Table 9. Block Lock Status Item Block Lock Configuration Block is Unlocked Block is Locked Block is Locked-Down Table 10. Protection Status (1) Current Protection Status (WP, DQ1, DQ0) Program/Erase Current State Allowed 1,0,0 yes (2) no 1,0,1 1,1,0 yes 1,1,1 no 0,0,0 yes (2) no 0,0,1 0,1,1 no Note: 1. The lock status is defined by the write protect pin and by DQ1 (‘1’ for a locked-down block) and DQ0 (‘1’ for a locked block) as read in the Read Electronic Signature command with ...
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... Suspend Status bit is High (set to ‘1’), a Program/ Erase Suspend command has been issued and the memory is waiting for a Program/Erase Re- sume command. The Program Suspend Status should only be considered valid when the Pro- M28W640FCT, M28W640FCB Status bit can be PP becomes invalid during an operation. PP Status bit is Low (set to ‘ ...
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... M28W640FCT, M28W640FCB gram/Erase Controller Status bit is High (Program/ Erase Controller inactive). Bit 2 is set within 5µs of the Program/Erase Suspend command being is- sued therefore the memory may still complete the operation rather than entering the Suspend mode. When a Program/Erase Resume command is is- sued the Program Suspend Status bit returns Low ...
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... European directive on Restrictions on Hazardous Substances (RoHS) 2002/95/EU. plied. Exposure to Absolute Maximum Rating con- ditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality docu- ments. Parameter (1) M28W640FCT, M28W640FCB Value Unit Min Max – – 40 125 – ...
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... Output Capacitance OUT Note: Sampled only, not 100% tested. 22/55 ment Conditions 13., Operating and AC Measurement Designers should check that the operating condi- tions in their circuit match the measurement condi- tions when relying on the quoted parameters. M28W640FCT, M28W640FCB 70 85 Min Max Min Max 2.7 3.6 2.7 3 ...
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... DDQ V V 2.7V 0.7 V DDQ I = 100µ min min DDQ DDQ I = –100µ min min DDQ DDQ M28W640FCT, M28W640FCB Min Typ Max ±1 ± 400 ...
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... ENABLED Parameter Min Max Min Min Max Max Min Min Max Max Min - t after the falling edge of E without increasing t GLQV tAXQX tEHQX tEHQZ tGHQX tGHQZ VALID STANDBY M28W640FCT, M28W640FCB 100 100 ...
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... Figure 10. Write AC Waveforms, Write Enable Controlled M28W640FCT, M28W640FCB 25/55 ...
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... Note: 1. Sampled only, not 100% tested. 2. Applicable seen as a logic input (V PP 26/55 Parameter Min Min Min Min Min Low Min PP Min Min Min Min Min Min Min Min Min Min < 3.6V). PP M28W640FCT, M28W640FCB 100 100 0 ...
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... Figure 11. Write AC Waveforms, Chip Enable Controlled M28W640FCT, M28W640FCB 27/55 ...
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... Note: 1. Sampled only, not 100% tested. 2. Applicable seen as a logic input (V PP 28/55 Parameter Min Min Min Min Min Min Min Min Min Min Low Min PP Min Min Min Min < 3.6V). PP M28W640FCT, M28W640FCB 100 ...
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... It is important to assert RP in order to allow proper CPU initialization during power up or reset. tPHWL tPHEL tPHGL Power-Up Test Condition During Program and Erase others < 100ns. PLPH M28W640FCT, M28W640FCB tPHWL tPHEL tPHGL tPLPH Reset AI03537b M28W640FCT, M28W640FCB Min Min Min 100 100 100 100 Min ...
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... M28W640FCT, M28W640FCB PACKAGE MECHANICAL Figure 13. TSOP48 - 48 lead Plastic Thin Small Outline 20mm, Package Outline DIE Note: Drawing is not to scale. Table 20. TSOP48 - 48 lead Plastic Thin Small Outline 20mm, Package Mechanical Data Symbol Typ A A1 0.100 A2 1.000 B 0.220 ...
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... M28W640FCT, M28W640FCB ddd A2 BGA-Z34 inches Typ Min 0.0102 0.0157 0.0138 0.2516 0.2476 0.2067 – 0.4134 0.4094 0.1476 – 0.0295 – 0.0224 – ...
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... M28W640FCT, M28W640FCB Figure 15. TFBGA48 Daisy Chain - Package Connections (Top view through package Figure 16. TFBGA48 Daisy Chain - PCB Connections proposal (Top view through package 32/ AI04390 START POINT END POINT ...
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... Package N = TSOP48 TFBGA48: 6.39 x 10.5mm, 0.75 mm pitch Temperature Range ° – °C Option Blank = Standard Package T = Tape & Reel Packing E = Lead-Free and RoHS Package, Standard Packing F = Lead-Free and RoHS Package, Tape & Reel Packing M28W640FCT, M28W640FCB M28W640FCT 33/55 ...
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... M28W640FCT, M28W640FCB Table 23. Daisy Chain Ordering Scheme Example: Device Type M28W640FC Daisy Chain -ZB = TFBGA48: 6.39 x 10.5mm, 0.75 mm pitch Option Blank = Standard Packing E = Lead-Free and RoHS Package, Standard Packing F = Lead-Free and RoHS Package, Tape & Reel Packing, 24mm T = Tape & Reel Packing, 24mm Note:Devices are shipped from the factory with the memory content bits erased to ’1’. For a list of available options (Speed, Package, etc ...
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... M28W640FCT, M28W640FCB Size # Address Range (KWord 2F0000-2F7FFF 41 32 2E8000-2EFFFF 42 32 2E0000-2E7FFF 43 32 2D8000-2DFFFF 44 32 2D0000-2D7FFF 45 32 2C8000-2CFFFF 46 32 2C0000-2C7FFF 47 32 2B8000-2BFFFF ...
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... M28W640FCT, M28W640FCB Size # Address Range (KWord 1A0000-1A7FFF 83 32 198000-19FFFF 84 32 190000-197FFF 85 32 188000-18FFFF 86 32 180000-187FFF 87 32 178000-17FFFF 88 32 170000-177FFF 89 32 168000-16FFFF 90 32 160000-167FFF 91 32 158000-15FFFF 92 32 150000-157FFF 93 32 148000-14FFFF 94 32 140000-147FFF 95 32 138000-13FFFF 96 32 130000-137FFF 97 32 128000-12FFFF 98 32 120000-127FFF 99 32 ...
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... M28W640FCT, M28W640FCB Size # Address Range (KWord 2A8000-2AFFFF 91 32 2A0000-2A7FFF 90 32 298000-29FFFF 89 32 290000-297FFF 88 32 288000-28FFFF 87 32 280000-287FFF 86 32 278000-27FFFF 85 32 270000-277FFF ...
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... M28W640FCT, M28W640FCB Size # Address Range (KWord 148000-14FFFF 47 32 140000-147FFF 46 32 138000-13FFFF 45 32 130000-137FFF 44 32 128000-12FFFF 43 32 120000-127FFF 42 32 118000-11FFFF 41 32 110000-117FFF 40 32 108000-10FFFF 39 32 100000-107FFF 38 32 0F8000-0FFFFF 37 32 0F0000-0F7FFF 36 32 0E8000-0EFFFF 35 32 0E0000-0E7FFF 34 32 0D8000-0DFFFF 33 32 0D0000-0D7FFF 32 32 0C8000-0CFFFF 31 32 ...
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... Address for Alternate Algorithm extended Query table (0000h means none exists) 1Ah 0000h Note: Query data are always presented on the lowest order data outputs (DQ7-DQ0) only. DQ8-DQ15 are ‘0’. M28W640FCT, M28W640FCB structure is read from the memory. Tables 26, 27, 28, 29, 30 and ...
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... M28W640FCT, M28W640FCB Table 28. CFI Query System Interface Information Offset Data V Logic Supply Minimum Program/Erase or Write voltage DD 1Bh 0027h bit 7 to 4BCD value in volts bit 3 to 0BCD value in 100 mV V Logic Supply Maximum Program/Erase or Write voltage DD 1Ch 0036h bit 7 to 4BCD value in volts ...
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... Region 2 Information 32h 0000h Number of identical-size erase block = 007Eh=1 33h 0000h Region 2 Information 34h 0001h Block size in Region 2 = 0100h * 256 byte Description n in number of bytes M28W640FCT, M28W640FCB Value 8 MByte x16 Async 127 64 KByte 8 8 KByte 8 8 KByte 127 ...
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... M28W640FCT, M28W640FCB Table 30. Primary Algorithm-Specific Extended Query Table Offset Data ( 35h (P+0)h = 35h 0050h (P+1)h = 36h 0052h Primary Algorithm extended Query table unique ASCII string “PRI” (P+2)h = 37h 0049h (P+3)h = 38h 0031h Major version number, ASCII (P+4)h = 39h 0030h Minor version number, ASCII (P+5)h = 3Ah 0066h Extended Query table contents for Primary Algorithm ...
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... Protection Register Lock 81h XXXX 82h XXXX 64 bits: unique device number 83h XXXX 84h XXXX 85h XXXX 86h XXXX 87h XXXX 88h XXXX 128 bits: User Programmable OTP 89h XXXX 8Ah XXXX 8Bh XXXX 8Ch XXXX M28W640FCT, M28W640FCB Description 43/55 ...
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... M28W640FCT, M28W640FCB APPENDIX C. FLOWCHARTS AND PSEUDO CODES Figure 17. Program Flowchart and Pseudo Code Start Write 40h or 10h Write Address & Data Read Status Register YES YES YES NO Program to Protected YES End Note: 1. Status check of b1 (Protected Block sequence ...
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... V PP Invalid if (status_register.b3==1) /*VPP invalid error */ Error (1, 2) error_handler ( ) ; if (status_register.b4==1) /*program error */ Program error_handler ( ) ; Error ( (status_register.b1==1) /*program to protect block error */ error_handler ( ) ; } Invalid) and b4 (Program Error) can be made after each program operation or after PP M28W640FCT, M28W640FCB addressToProgram2, dataToProgram2) /*see note (3) */ /*see note (3) */ AI03539b 45/55 ...
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... M28W640FCT, M28W640FCB Figure 19. Quadruple Word Program Flowchart and Pseudo Code Start Write 56h Write Address 1 & Data 1 (3) Write Address 2 & Data 2 (3) Write Address 3 & Data 3 (3) Write Address 4 & Data 4 (3) Read Status Register YES YES ...
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... NO NO Program Complete if (status_register.b2==0) /*program completed */ else Write FFh } Read Data M28W640FCT, M28W640FCB writeToFlash (any_address, 0xB0) ; writeToFlash (any_address, 0x70 read status register to check if program has already completed */ status_register=readFlash (any_address must be toggled*/ } while (status_register.b7 writeToFlash (any_address, 0xFF) ; read_data ( ) ; /*read data from another block*/ /*The device returns to Read Array (as if program/erase suspend was not issued) ...
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... M28W640FCT, M28W640FCB Figure 21. Erase Flowchart and Pseudo Code Start Write 20h Write Block Address & D0h Read Status Register YES YES YES b4 YES YES End Note error is found, the Status Register must be cleared before further Program/Erase operations. ...
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... Erase Continues erase_suspend_command ( ) { (status_register.b6==0) /*erase completed */ Erase Complete else Write FFh } Read Data M28W640FCT, M28W640FCB writeToFlash (any_address, 0xB0) ; writeToFlash (any_address, 0x70 read status register to check if erase has already completed */ do { status_register=readFlash (any_address must be toggled*/ } while (status_register.b7 writeToFlash (any_address, 0xFF) ; read_data ( ) ; ...
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... M28W640FCT, M28W640FCB Figure 23. Locking Operations Flowchart and Pseudo Code Start Write 60h Write 01h, D0h or 2Fh Write 90h Read Block Lock States Locking change confirmed? YES Write FFh End 50/55 locking_operation_command (address, lock_operation) { writeToFlash (any_address, 0x60) ; /*configuration setup*/ if (lock_operation==LOCK) /*to protect the block*/ writeToFlash (address, 0x01) ...
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... V PP Invalid if (status_register.b3==1) /*VPP invalid error */ Error (1, 2) error_handler ( ) ; Program if (status_register.b4==1) /*program error */ Error (1, 2) error_handler ( ) ; if (status_register.b1==1) /*program to protect block error */ Block Error (1, 2) error_handler ( ) ; } Invalid) and b4 (Program Error) can be made after each program operation or after PP M28W640FCT, M28W640FCB AI04381 51/55 ...
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... M28W640FCT, M28W640FCB APPENDIX D. COMMAND INTERFACE AND PROGRAM/ERASE CONTROLLER STATE Table 32. Write State Machine Current/Next, sheet Data Current SR Read When State bit 7 Array Read (FFh) Read Array “1” Array Read Array Prog.Setup Read “1” Status Read Array Status Read Electronic “ ...
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... Prot. Prog. Lock Setup Setup Erase (continue) Lock Setup Lock Setup Lock Setup Lock Setup Prot. Prog. Lock Setup Setup M28W640FCT, M28W640FCB Lock Confirm Lock Down (01h) Confirm (2Fh) Read Array Read Array Read Array Read Array Lock (complete) Read Array ...
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... M28W640FCT, M28W640FCB REVISION HISTORY Table 34. Document Revision History Date Version 24-May-2004 0.1 23-Aug-2004 0.2 08-Apr-2005 1.0 54/55 Revision Details First Issue Figure 3., TSOP Connections and package) updated. Datasheet maturity changed to PRELIMINARY DATA. TSOP48 Package Mechanical Data updated in Thin Small Outline 20mm, Package Mechanical Figure 4., TFBGA Connections (Top view through Table 20 ...
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