M28W640 STMicroelectronics, M28W640 Datasheet
M28W640
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M28W640 Summary of contents
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... PROGRAM/ERASE CYCLES per BLOCK ELECTRONIC SIGNATURE – Manufacturer Code: 20h – Top Device Code, M28W640CT: 8848h – Bottom Device Code, M28W640CB: 8849h November 2001 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. ...
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... M28W640CT, M28W640CB TABLE OF CONTENTS SUMMARY DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 1. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 3. TSOP Connections Figure 4. TFBGA Connections (Top view through package Figure 5. Block Addresses Figure 6. Security Block Memory Map SIGNAL DESCRIPTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Address Inputs (A0-A21 Data Input/Output (DQ0-DQ15 Chip Enable (E Output Enable (G Write Enable (W) ...
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... Table 15. Read AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 10. Write AC Waveforms, Write Enable Controlled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 16. Write AC Characteristics, Write Enable Controlled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 11. Write AC Waveforms, Chip Enable Controlled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 17. Write AC Characteristics, Chip Enable Controlled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 12. Power-Up and Reset AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Table 18. Power-Up and Reset AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 PACKAGE MECHANICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 M28W640CT, M28W640CB 3/54 ...
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... REVISION HISTORY Table 23. Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 APPENDIX A. BLOCK ADDRESS TABLES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Table 24. Top Boot Block Addresses, M28W640CT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Table 25. Bottom Boot Block Addresses, M28W640CB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 APPENDIX B. COMMON FLASH INTERFACE (CFI Table 26. Query Structure Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 27. CFI Query Identification String . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 28. CFI Query System Interface Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Table 29 ...
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... SUMMARY DESCRIPTION The M28W640C Mbit (4 Mbit x 16) non-vol- atile Flash memory that can be erased electrically at the block level and programmed in-system on a Word-by-Word basis. These operations can be performed using a single low voltage (2.7 to 3.6V) supply. V allows to drive the I/O pin down to DDQ 1 ...
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... M28W640CT, M28W640CB Figure 3. TSOP Connections 6/54 A15 1 48 A14 A13 A12 A11 A10 A9 A8 A21 A20 M28W640CT M28W640CB A19 A18 A17 AI04379 A16 V DDQ V SS DQ15 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 V DD ...
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... V DDQ A11 A18 A10 W A12 A9 A21 A20 DQ14 DQ5 DQ11 DQ2 DQ15 DQ6 DQ12 DQ3 DQ7 DQ13 DQ4 V DD M28W640CT, M28W640CB A19 A7 A4 A17 DQ8 E A0 DQ9 DQ0 V SS DQ10 DQ1 G AI04380 7/54 ...
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... M28W640CT, M28W640CB Figure 5. Block Addresses M28W640CT Top Boot Block Addresses 3FFFFF 4 KWords 3FF000 3F8FFF 4 KWords 3F8000 3F7FFF 32 KWords 3F0000 00FFFF 32 KWords 008000 007FFF 32 KWords 000000 Note: Also see Appendix A, Tables 24 and 25 for a full listing of the Block Addresses. Figure 6. Security Block Memory Map ...
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... Note: Each device in a system should have DDQ , pacitor close to the pin. See Figure 8, AC Mea- IL surement Load Circuit. The PCB trace widths should be sufficient to carry the required V program and erase currents. M28W640CT, M28W640CB can be tied can use a DDQ can be applied in PP ...
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... M28W640CT, M28W640CB BUS OPERATIONS There are six standard bus operations that control the device. These are Bus Read, Bus Write, Out- put Disable, Standby, Automatic Standby and Re- set. See Table 2, Bus Operations, for a summary. Typically glitches of less than 5ns on Chip Enable or Write Enable are ignored by the memory and do not affect bus operations ...
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... Read Status Register command and the Program/Erase Suspend command. Typical Pro- gram times are given in Table 7, Program, Erase Times and Program/Erase Endurance Cycles. Programming aborts if Reset goes to V integrity cannot be guaranteed when the program operation is aborted, the block containing the M28W640CT, M28W640CB . As data integrity data IL 11/54 ...
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... M28W640CT, M28W640CB memory location must be erased and repro- grammed. See Appendix C, Figure 17, Program Flowchart and Pseudo Code, for the flowchart for using the Program command. Double Word Program Command This feature is offered to improve the programming throughput, writing a page of two adjacent words in parallel ...
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... Two Bus Write cycles are required to issue the Block Lock command. The first bus cycle sets up the Block Lock command. M28W640CT, M28W640CB The second Bus Write cycle latches the block address. The lock status can be monitored for each block using the Read Electronic Signature command. ...
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... M28W640CT, M28W640CB Table 3. Commands Commands 1st Cycle Op. Add Data Op. Add Data Read Memory 1+ Write X Array Read Status 1+ Write X Register Read Electronic 1+ Write X Signature Read CFI Query 1+ Write X Erase 2 Write X Program 2 Write X Double Word 3 Write X (3) Program Quadruple Word 5 Write X (4) Program ...
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... OTP data 88h Don't Care OTP data 89h Don't Care OTP data 8Ah Don't Care OTP data 8Bh Don't Care OTP data 8Ch Don't Care OTP data M28W640CT, M28W640CB A12-A21 DQ0 DQ1 ( DQ1 DQ2 DQ3-DQ7 DQ8-DQ15 OTP Prot. Security ...
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... Note: 1. Typical time to program a Main or Parameter Block using the Double Word Program and the Quadruple Word Program commands respectively. BLOCK LOCKING The M28W640C features an instant, individual block locking scheme that allows any block to be locked or unlocked with no latency. This locking scheme has three levels of protection. ...
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... Item Block Lock Configuration Block is Unlocked Block is Locked Block is Locked-Down M28W640CT, M28W640CB Locking Operations During Erase Suspend Changes to block lock status can be performed during an erase suspend by using the standard locking command sequences to unlock, lock or lock-down a block. This is useful in the case when another block needs to be updated while an erase operation is in progress ...
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... M28W640CT, M28W640CB Table 9. Protection Status Current (1) Protection Status (WP, DQ1, DQ0) Program/Erase Current State Allowed 1,0,0 yes (2) no 1,0,1 1,1,0 yes 1,1,1 no 0,0,0 yes (2) no 0,0,1 0,1,1 no Note: 1. The lock status is defined by the write protect pin and by DQ1 (‘1’ for a locked-down block) and DQ0 (‘1’ for a locked block) as read in the Read Electronic Signature command with ...
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... Suspend Status bit is High (set to ‘1’), a Program/ Erase Suspend command has been issued and the memory is waiting for a Program/Erase Re- sume command. The Program Suspend Status should only be considered valid when the Pro- M28W640CT, M28W640CB Status bit can be PP becomes invalid during an operation. PP Status bit is Low (set to ‘ ...
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... M28W640CT, M28W640CB gram/Erase Controller Status bit is High (Program/ Erase Controller inactive). Bit 2 is set within 5µs of the Program/Erase Suspend command being is- sued therefore the memory may still complete the operation rather than entering the Suspend mode. When a Program/Erase Resume command is is- sued the Program Suspend Status bit returns Low ...
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... PP Note: 1. Depends on range. plied. Exposure to Absolute Maximum Rating con- ditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality docu- ments. Parameter (1) M28W640CT, M28W640CB Value Unit Min Max – – 40 125 – 55 ...
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... Min 3.0 2 – DDQ Figure 8. AC Measurement Load Circuit V DDQ /2 V DDQ AI00610 0.1µF Test Condition OUT M28W640CT, M28W640CB 90 Max Min Max 3.6 2.7 3.6 3.3 2.7 3.3 85 – DDQ DDQ / DDQ V DDQ ...
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... V V 2.7V 0.7 V DDQ I = 100µ min min DDQ DDQ I = –100µ min min DDQ DDQ M28W640CT, M28W640CB Min Typ Max ±1 ± 400 –0.5 0.4 –0.5 0.8 – ...
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... M28W640CT, M28W640CB Figure 9. Read AC Waveforms A0-A21 E G DQ0-DQ15 ADDR. VALID CHIP ENABLE Table 15. Read AC Characteristics Symbol Alt t t Address Valid to Next Address Valid AVAV Address Valid to Output Valid AVQV ACC (1) t Address Transition to Output Transition t OH AXQX (1) t Chip Enable High to Output Transition ...
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... Figure 10. Write AC Waveforms, Write Enable Controlled M28W640CT, M28W640CB 25/54 ...
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... M28W640CT, M28W640CB Table 16. Write AC Characteristics, Write Enable Controlled Symbol Alt t t Write Cycle Time AVAV Address Valid to Write Enable High AVWH Data Valid to Write Enable High DVWH Chip Enable Low to Write Enable Low ELWL CS t Chip Enable Low to Output Valid ...
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... Figure 11. Write AC Waveforms, Chip Enable Controlled M28W640CT, M28W640CB 27/54 ...
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... M28W640CT, M28W640CB Table 17. Write AC Characteristics, Chip Enable Controlled Symbol Alt t t Write Cycle Time AVAV Address Valid to Chip Enable High AVEH Data Valid to Chip Enable High DVEH DS Chip Enable High to Address t t EHAX AH Transition t t Chip Enable High to Data Transition ...
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... Sampled only, not 100% tested important to assert RP in order to allow proper CPU initialization during power up or reset. tPHWL tPHEL tPHGL Power-Up Test Condition During Program and Erase others < 100ns. PLPH M28W640CT, M28W640CB tPHWL tPHEL tPHGL tPLPH Reset AI03537b M28W640C Unit 80 90 Min ...
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... M28W640CT, M28W640CB PACKAGE MECHANICAL Figure 13. TSOP48 - 48 lead Plastic Thin Small Outline 20mm, Package Outline 1 N/2 TSOP-a Note: Drawing is not to scale. Table 19. TSOP48 - 48 lead Plastic Thin Small Outline 20mm, Package Mechanical Data Symbol Typ 0. 30/ ...
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... M28W640CT, M28W640CB ddd A2 BGA-Z34 inches Typ Min 0.0102 0.0157 0.0138 0.2516 0.2476 0.2067 – 0.4134 0.4094 0.1476 – 0.0295 – 0.0224 – ...
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... M28W640CT, M28W640CB Figure 15. TFBGA48 Daisy Chain - Package Connections (Top view through package Figure 16. TFBGA48 Daisy Chain - PCB Connections proposal (Top view through package 32/ AI04390 START POINT END POINT ...
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... T = Tape & Reel Packing Note:Devices are shipped from the factory with the memory content bits erased to ’1’. For a list of available options (Speed, Package, etc...) or for further information on any aspect of this device, please contact the ST Sales Office nearest to you. M28W640CT, M28W640CB M28W640CT 90 N ...
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... M28W640CT, M28W640CB REVISION HISTORY Table 23. Document Revision History Date Version 20-Apr-2001 -01 18-Jun-2001 -02 02-Jul-2001 -03 31-Oct-2001 -06 34/54 Revision Details First Issue (Brief Data) Document expanded to full Product Preview, TFBGA48 Package Mechanical Data changed Corrections to Table 3. Commands (Lock, Unlock, Lock-Down) Document status changed from Product Preview to Preliminary Data V maximum changed to 3 ...
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... M28W640CT, M28W640CB 40 32 2F0000-2F7FFF 41 32 2E8000-2EFFFF 42 32 2E0000-2E7FFF 43 32 2D8000-2DFFFF 44 32 2D0000-2D7FFF 45 32 2C8000-2CFFFF 46 32 2C0000-2C7FFF 47 32 2B8000-2BFFFF 48 32 2B0000-2B7FFF 49 32 ...
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... M28W640CT, M28W640CB 84 32 190000-197FFF 85 32 188000-18FFFF 86 32 180000-187FFF 87 32 178000-17FFFF 88 32 170000-177FFF 89 32 168000-16FFFF 90 32 160000-167FFF 91 32 158000-15FFFF 92 32 150000-157FFF 93 32 148000-14FFFF 94 32 140000-147FFF 95 32 138000-13FFFF 96 32 130000-137FFF 97 32 128000-12FFFF 98 32 120000-127FFF 99 32 118000-11FFFF 100 32 110000-117FFF 101 32 108000-10FFFF 102 32 100000-107FFF 103 ...
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... M28W640CT, M28W640CB 92 32 2A8000-2AFFFF 91 32 2A0000-2A7FFF 90 32 298000-29FFFF 89 32 290000-297FFF 88 32 288000-28FFFF 87 32 280000-287FFF 86 32 278000-27FFFF 85 32 270000-277FFF 84 32 268000-26FFFF 83 32 ...
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... M28W640CT, M28W640CB 46 32 138000-13FFFF 45 32 130000-137FFF 44 32 128000-12FFFF 43 32 120000-127FFF 42 32 118000-11FFFF 41 32 110000-117FFF 40 32 108000-10FFFF 39 32 100000-107FFF 38 32 0F8000-0FFFFF 37 32 0F0000-0F7FFF 36 32 0E8000-0EFFFF 35 32 0E0000-0E7FFF 34 32 0D8000-0DFFFF 33 32 0D0000-0D7FFF 32 32 0C8000-0CFFFF 31 32 0C0000-0C7FFF 30 32 0B8000-0BFFFF 29 32 0B0000-0B7FFF 28 32 0A8000-0AFFFF 27 32 ...
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... Note: Query data are always presented on the lowest order data outputs (DQ7-DQ0) only. DQ8-DQ15 are ‘0’. M28W640CT, M28W640CB structure is read from the memory. Tables 26, 27, 28, 29, 30 and 31 show the addresses used to re- trieve the data. ...
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... M28W640CT, M28W640CB Table 28. CFI Query System Interface Information Offset Data V Logic Supply Minimum Program/Erase or Write voltage DD 1Bh 0027h V Logic Supply Maximum Program/Erase or Write voltage DD 1Ch 0036h V [Programming] Supply Minimum Program/Erase voltage PP 1Dh 00B4h V [Programming] Supply Maximum Program/Erase voltage PP 1Eh 00C6h 1Fh ...
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... Region 2 Information 32h 0000h Number of identical-size erase block = 007Eh=1 33h 0000h Region 2 Information 34h 0001h Block size in Region 2 = 0100h * 256 byte Description n in number of bytes M28W640CT, M28W640CB Value 8 MByte x16 Async 127 64 KByte 8 8 KByte 8 8 KByte 127 ...
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... M28W640CT, M28W640CB Table 30. Primary Algorithm-Specific Extended Query Table Offset Data ( 35h (P+0)h = 35h 0050h (P+1)h = 36h 0052h Primary Algorithm extended Query table unique ASCII string “PRI” (P+2)h = 37h 0049h (P+3)h = 38h 0031h Major version number, ASCII (P+4)h = 39h 0030h Minor version number, ASCII (P+5)h = 3Ah 0066h Extended Query table contents for Primary Algorithm ...
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... Protection Register Lock 81h XXXX 82h XXXX 64 bits: unique device number 83h XXXX 84h XXXX 85h XXXX 86h XXXX 87h XXXX 88h XXXX 128 bits: User Programmable OTP 89h XXXX 8Ah XXXX 8Bh XXXX 8Ch XXXX M28W640CT, M28W640CB Description 43/54 ...
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... M28W640CT, M28W640CB APPENDIX C. FLOWCHARTS AND PSEUDO CODES Figure 17. Program Flowchart and Pseudo Code Start Write 40h or 10h Write Address & Data Read Status Register YES YES YES NO Program to Protected YES End Note: 1. Status check of b1 (Protected Block sequence ...
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... V PP Invalid if (status_register.b3==1) /*VPP invalid error */ Error (1, 2) error_handler ( ) ; if (status_register.b4==1) /*program error */ Program error_handler ( ) ; Error ( (status_register.b1==1) /*program to protect block error */ error_handler ( ) ; } Invalid) and b4 (Program Error) can be made after each program operation or after PP M28W640CT, M28W640CB addressToProgram2, dataToProgram2) /*see note (3) */ /*see note (3) */ AI03539b 45/54 ...
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... M28W640CT, M28W640CB Figure 19. Quadruple Word Program Flowchart and Pseudo Code Start Write 55h Write Address 1 & Data 1 (3) Write Address 2 & Data 2 (3) Write Address 3 & Data 3 (3) Write Address 4 & Data 4 (3) Read Status Register YES YES ...
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... NO NO Program Complete if (status_register.b2==0) /*program completed */ else Write FFh } Read Data M28W640CT, M28W640CB writeToFlash (any_address, 0xB0) ; writeToFlash (any_address, 0x70 read status register to check if program has already completed */ status_register=readFlash (any_address must be toggled*/ } while (status_register.b7 writeToFlash (any_address, 0xFF) ; read_data ( ) ; /*read data from another block*/ /*The device returns to Read Array (as if program/erase suspend was not issued) ...
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... M28W640CT, M28W640CB Figure 21. Erase Flowchart and Pseudo Code Start Write 20h Write Block Address & D0h Read Status Register YES YES YES b4 YES YES End Note error is found, the Status Register must be cleared before further Program/Erase operations. ...
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... Erase Continues erase_suspend_command ( ) { (status_register.b6==0) /*erase completed */ Erase Complete else Write FFh } Read Data M28W640CT, M28W640CB writeToFlash (any_address, 0xB0) ; writeToFlash (any_address, 0x70 read status register to check if erase has already completed */ do { status_register=readFlash (any_address must be toggled*/ } while (status_register.b7 writeToFlash (any_address, 0xFF) ; read_data ( ) ; ...
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... M28W640CT, M28W640CB Figure 23. Locking Operations Flowchart and Pseudo Code Start Write 60h Write 01h, D0h or 2Fh Write 90h Read Block Lock States Locking change confirmed? YES Write FFh End 50/54 locking_operation_command (address, lock_operation) { writeToFlash (any_address, 0x60) ; /*configuration setup*/ if (lock_operation==LOCK) /*to protect the block*/ writeToFlash (address, 0x01) ...
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... V PP Invalid if (status_register.b3==1) /*VPP invalid error */ Error (1, 2) error_handler ( ) ; Program if (status_register.b4==1) /*program error */ Error (1, 2) error_handler ( ) ; if (status_register.b1==1) /*program to protect block error */ Block Error (1, 2) error_handler ( ) ; } Invalid) and b4 (Program Error) can be made after each program operation or after PP M28W640CT, M28W640CB AI04381 51/54 ...
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... M28W640CT, M28W640CB APPENDIX D. COMMAND INTERFACE AND PROGRAM/ERASE CONTROLLER STATE Table 32. Write State Machine Current/Next, sheet Data Current SR Read When State bit 7 Array Read (FFh) Read Array “1” Array Read Array Prog.Setup Read “1” Status Read Array Status Read Electronic “ ...
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... Prot. Prog. Lock Setup Setup Erase (continue) Lock Setup Lock Setup Lock Setup Lock Setup Prot. Prog. Lock Setup Setup M28W640CT, M28W640CB Lock Confirm Lock Down (01h) Confirm (2Fh) Read Array Read Array Read Array Read Array Lock (complete) Read Array ...
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... M28W640CT, M28W640CB Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice ...