MC74VHCT125ADT ON Semiconductor, MC74VHCT125ADT Datasheet

MC74VHCT125ADT

Manufacturer Part Number

MC74VHCT125ADT

Description

Manufacturer

ON Semiconductor

Datasheets

1.MC74VHCT125A.pdf (7 pages)

2.MC74VHCT125ADT.pdf (8 pages)

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MC74VHCT125A

Quad Bus Buffer

with 3−State Control Inputs

fabricated with silicon gate CMOS technology. It achieves high speed

operation similar to equivalent Bipolar Schottky TTL while

maintaining CMOS low power dissipation.

set High to place the output into the high impedance state.

be used as a level converter for interfacing 3.3 V to 5.0 V, because it

has full 5.0 V CMOS level output swings.

between 0 V and 5.5 V are applied, regardless of the supply voltage.

The output structures also provide protection when V

input and output structures help prevent device destruction caused by

supply voltage − input/output voltage mismatch, battery backup, hot

insertion, etc.

output which provides high noise immunity and stable output. The

inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V

systems to 3.0 V systems.

Features

•

*For additional information on our Pb−Free strategy and soldering details, please

January, 2006 − Rev. 7

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

The MC74VHCT125A is a high speed CMOS quad bus buffer

The MC74VHCT125A requires the 3−state control input (OE) to be

The VHCT inputs are compatible with TTL levels. This device can

The VHCT125A input structures provide protection when voltages

The internal circuit is composed of three stages, including a buffer

High Speed: t

Low Power Dissipation: I

TTL−Compatible Inputs: V

Power Down Protection Provided on Inputs

Balanced Propagation Delays

Designed for 2.0 V to 5.5 V Operating Range

Low Noise: V

Pin and Function Compatible with Other Standard Logic Families

Latchup Performance Exceeds 300 mA

ESD Performance:

Chip Complexity: 72 FETs or 18 Equivalent Gates

Pb−Free Packages are Available*

Human Body Model > 2000 V;

Machine Model > 200 V

OLP

= 3.8 ns (Typ) at V

= 0.8 V (Max)

= 4.0 mA (Max) at T

= 0.8 V; V

= 5.0 V

= 2.0 V

= 25°C

= 0 V. These

See detailed ordering and shipping information in the package

dimensions section on page 2 of this data sheet.

(Note: Microdot may be in either location)

Location

L, WL

Y, YY

WW, W

G or G

ORDERING INFORMATION

http://onsemi.com

CASE 751A

CASE 948G

SOEIAJ−14

TSSOP−14

DT SUFFIX

M SUFFIX

CASE 965

D SUFFIX

SOIC−14

= Pb−Free Package

Publication Order Number:

Assembly

Wafer Lot

Year

Work Week

MC74VHCT125A/D

DIAGRAMS

VHCT125AG

MARKING

AWLYWW

VHCT125

ALYWG

VHCT

125A

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