pck946 NXP Semiconductors, pck946 Datasheet

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pck946

Manufacturer Part Number
pck946
Description
Pck946 Low Voltage 1 10 Cmos Clock Driver
Manufacturer
NXP Semiconductors
Datasheet

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1. General description
2. Features
The PCK946 is a low voltage CMOS 1 : 10 clock buffer. The 10 outputs can be configured
into a standard fan-out buffer or into 1 and
designed and optimized to drive 50
With output-to-output skews of 350 ps, the PCK946 is ideal as a clock distribution chip for
synchronous systems which need a tight level of skew from a large number of outputs.
With an output impedance of approximately 7 , in both the HIGH and LOW logic states,
the output buffers of the PCK946 are ideal for driving series terminated transmission lines.
More specifically, each of the 10 PCK946 outputs can drive two series terminated
transmission lines. With this capability, the PCK946 has an effective fan-out of 1 : 20 in
applications using point-to-point distribution schemes.
The PCK946 has the capability of generating 1 and
design is fully static; the signals are generated and re-timed inside the chip to ensure
minimal skew between the 1 and
the user to select the ratio of 1 outputs to
Two independent LVCMOS/LVTTL compatible clock inputs are available. Designers can
take advantage of this feature to provide redundant clock sources or the addition of a test
clock into the system design. With the TCLK_SEL input pulled HIGH, the TCLK1 input is
selected.
All of the control inputs are LVCMOS/LVTTL compatible. The DSELn pins choose
between 1 and
MR/OE input will reset the internal flip-flops and 3-state the outputs when it is forced
HIGH.
The PCK946 is fully 3.3 V compatible. The 32-lead LQFP package was chosen to
optimize performance, board space, and cost of the device. The 32-lead LQFP package
has a 7 mm
PCK946
Low voltage 1 : 10 CMOS clock driver
Rev. 01 — 13 December 2005
2 selectable LVCMOS/LVTTL clock inputs
350 ps output-to-output skew
Drives up to 20 series terminated independent clock lines
Maximum input/output frequency of 150 MHz
3-stateable outputs
32-lead LQFP packaging
3.3 V V
CC
supply voltage
7 mm body size with a conservative 0.8 mm pin spacing.
1
2
outputs. A LOW on the DSELn pins will select the 1 output. The
1
2
series or parallel terminated transmission lines.
signals. The device features selectability to allow
1
1
2
2
outputs.
combinations. The ten outputs were
1
2
signals from a 1 source. The
Product data sheet

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pck946 Summary of contents

Page 1

... Low voltage CMOS clock driver Rev. 01 — 13 December 2005 1. General description The PCK946 is a low voltage CMOS clock buffer. The 10 outputs can be configured into a standard fan-out buffer or into 1 and designed and optimized to drive 50 With output-to-output skews of 350 ps, the PCK946 is ideal as a clock distribution chip for synchronous systems which need a tight level of skew from a large number of outputs ...

Page 2

... Philips Semiconductors 3. Ordering information Table 1: Type number PCK946BD 4. Functional diagram Fig 1. Functional diagram of PCK946 9397 750 12296 Product data sheet Ordering information Package Name Description LQFP32 plastic low profile quad flat package; 32 leads; body 7 7 1.4 mm (internal pull-down) TCLK_SEL (internal pull-up) ...

Page 3

... CMOS clock inputs 9, 13, 17, 18, supply voltage 22, 25 supply voltage Rev. 01 — 13 December 2005 PCK946 Low voltage CMOS clock driver 24 GND 23 QB0 QB1 PCK946BD 20 GND 19 QB2 002aaa677 © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...

Page 4

... MR/OE function table Outputs enabled high-impedance Limiting values Parameter Conditions supply voltage input voltage input current CMOS inputs storage temperature Rev. 01 — 13 December 2005 PCK946 Low voltage CMOS clock driver Min Max 0.3 +4 +125 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. ...

Page 5

... C power dissipation capacitance PD I maximum quiescent supply current q(max) [1] The PCK946 can drive 50 transmission lines on the incident edge. Each output can drive one 50 line to the termination voltage of V [2] I current is a result of internal pull-up/pull-down resistors Dynamic characteristics Table 8: ...

Page 6

... Fig 3. Single versus dual transmission lines The waveform plots of versus two lines. In both cases the drive capability of the PCK946 output buffers is more than sufficient to drive 50 measurements in the simulations a delta of only 43 ps exists between the two differently loaded outputs ...

Page 7

... IN 1 PCK946 OUTPUT BUFFER Rev. 01 — 13 December 2005 PCK946 Low voltage CMOS clock driver 002aaa679 OutA t = 3.8956 ns d OutB t = 3.9386 time (ns 002aaa680 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. ...

Page 8

... Rev. 01 — 13 December 2005 Low voltage CMOS clock driver detail 9.15 0.75 0.9 1 0.2 0.25 0.1 8.85 0.45 0.5 EUROPEAN PROJECTION © Koninklijke Philips Electronics N.V. 2005. All rights reserved. PCK946 SOT358 ( 0.5 0 ISSUE DATE 03-02-25 05-11- ...

Page 9

... Product data sheet Low voltage CMOS clock driver 2 called small/thin packages. Rev. 01 — 13 December 2005 PCK946 3 350 mm so called © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...

Page 10

... LBGA, LFBGA, SQFP, [3] , TFBGA, VFBGA, XSON , SO, SOJ [8] [9] [8] , PMFP , WQCCN.. measured in the atmosphere of the reflow oven. The package Rev. 01 — 13 December 2005 PCK946 Low voltage CMOS clock driver Soldering method Wave Reflow not suitable suitable [4] not suitable suitable suitable ...

Page 11

... Low Voltage Complementary Metal Oxide Silicon Low Voltage Transistor-Transistor Logic Data sheet status Change notice Product data sheet - Rev. 01 — 13 December 2005 PCK946 Low voltage CMOS clock driver Doc. number Supersedes 9397 750 12296 - © Koninklijke Philips Electronics N.V. 2005. All rights reserved. ...

Page 12

... Trademarks Notice — All referenced brands, product names, service names and trademarks are the property of their respective owners. Rev. 01 — 13 December 2005 PCK946 Low voltage CMOS clock driver © Koninklijke Philips Electronics N.V. 2005. All rights reserved ...

Page 13

... No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Published in The Netherlands PCK946 Date of release: 13 December 2005 Document number: 9397 750 12296 ...

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