PESD5V0S2BT,215 NXP Semiconductors, PESD5V0S2BT,215 Datasheet - Page 7

• Manufacturer Part Number: PESD5V0S2BT,215
• Description: DIODE BIDIR ESD PROTECT SOT23
• Manufacturer: NXP Semiconductors

Specifications of PESD5V0S2BT,215

• Package / Case: SOT-23-3, TO-236-3, Micro3™, SSD3, SST3
• Voltage - Reverse Standoff (typ): 5V
• Voltage - Breakdown: 5.5V
• Power (watts): 130W
• Polarization: 2 Channel Array - Bidirectional
• Mounting Type: Surface Mount
• Polarity: Bidirectional
• Clamping Voltage: 14 V
• Operating Voltage: 5 V
• Breakdown Voltage: 9.5 V
• Termination Style: SMD/SMT
• Peak Surge Current: 12 A
• Peak Pulse Power Dissipation: 130 W
• Capacitance: 35 pF
• Maximum Operating Temperature: + 150 C
• Minimum Operating Temperature: - 65 C
• Dimensions: 1.4 (Max) mm W x 3 (Max) mm L
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-4056-2; 934058007215; PESD5V0S2BT T/R; PESD5V0S2BT T/R

NXP Semiconductors
7. Application information
PESD5V0S2BT_3
Product data sheet
The PESD5V0S2BT is designed for the bidirectional protection of two lines from the
damage caused by ElectroStatic Discharge (ESD) and surge pulses.
The PESD5V0S2BT may be used on lines where the signal polarities are both, positive
and negative with respect to ground. The PESD5V0S2BT provides a surge capability of
130 W per line for an 8/20 s waveform.
Circuit board layout and protection device placement:
Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT)
and surge transients. The following guidelines are recommended:
1. Place the PESD5V0S2BT as close to the input terminal or connector as possible.
2. The path length between the PESD5V0S2BT and the protected line should be
3. Keep parallel signal paths to a minimum.
4. Avoid running protected conductors in parallel with unprotected conductors.
5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and
6. Minimize the length of the transient return path to ground.
7. Avoid using shared transient return paths to a common ground point.
8. Ground planes should be used whenever possible. For multilayer PCBs, use ground
Fig 8.
minimized.
ground loops.
vias.
Typical application for bidirectional protection of two lines
Rev. 03 — 9 February 2009
Low capacitance bidirectional double ESD protection diode
PESD5V0S2BT
line 1 to be protected
line 2 to be protected
001aaa636
GND
PESD5V0S2BT
© NXP B.V. 2009. All rights reserved.
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