PIC16F884-I/PT Microchip Technology, PIC16F884-I/PT Datasheet - Page 24

• Manufacturer Part Number: PIC16F884-I/PT
• Description: IC PIC MCU FLASH 4KX14 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F884-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 7KB (4K x 14)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: MSSP/EUSART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM164120-2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 14-ch x 10-bit
• Package: 44TQFP
• Device Core: PIC
• Family Name: PIC16
• Maximum Speed: 20 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPAC164305 - MODULE SKT FOR PM3 44TQFP444-1001 - DEMO BOARD FOR PICMICRO MCU
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16F882/883/884/886/887
2.2
The data memory (see Figures 2-2 and 2-3) is
partitioned into four banks which contain the General
Purpose Registers (GPR) and the Special Function
Registers (SFR). The Special Function Registers are
located in the first 32 locations of each bank. The
General Purpose Registers, implemented as static
RAM, are located in the last 96 locations of each Bank.
Register locations F0h-FFh in Bank 1, 170h-17Fh in
Bank 2 and 1F0h-1FFh in Bank 3, point to addresses
70h-7Fh in Bank 0. The actual number of General
Purpose Resisters (GPR) implemented in each Bank
depends on the device. Details are shown in
Figures 2-5 and 2-6. All other RAM is unimplemented
and returns ‘0’ when read. RP<1:0> of the STATUS
register are the bank select bits:
RP1 RP0
2.2.1
The register file is organized as 128 x 8 in the
PIC16F882, 256 x 8 in the PIC16F883/PIC16F884, and
368 x 8 in the PIC16F886/PIC16F887. Each register is
accessed, either directly or indirectly, through the File
Select Register (FSR) (see Section 2.4 “Indirect
Addressing, INDF and FSR Registers”).
2.2.2
The Special Function Registers are registers used by
the CPU and peripheral functions for controlling the
desired operation of the device (see Table 2-1). These
registers are static RAM.
The special registers can be classified into two sets:
core and peripheral. The Special Function Registers
associated with the “core” are described in this section.
Those related to the operation of the peripheral
features are described in the section of that peripheral
feature.
DS41291D-page 22
0
0
1
1
Note:
0
1
0
1
Data Memory Organization
→Bank 0 is selected
→Bank 1 is selected
→Bank 2 is selected
→Bank 3 is selected
GENERAL PURPOSE REGISTER
FILE
The IRP and RP1 bits of the STATUS reg-
ister are reserved and should always be
maintained as ‘0’s.
SPECIAL FUNCTION REGISTERS
Preliminary
© 2007 Microchip Technology Inc.