ATTINY2313-20MU Atmel, ATTINY2313-20MU Datasheet - Page 161

• Manufacturer Part Number: ATTINY2313-20MU
• Description: IC MCU AVR 2K FLASH 20MLF
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY2313-20MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 2KB (1K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-MLF®, QFN
• Processor Series: ATTINY2x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: SPI/UART/USI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• Package: 20MLF EP
• Device Core: AVR
• Family Name: ATtiny
• Maximum Speed: 20 MHz
• For Use With: ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q2312268A

Parallel
Programming
Parameters, Pin
Mapping, and
Commands
Signal Names
2543L–AVR–08/10
This section describes how to parallel program and verify Flash Program memory, EEPROM
Data memory, Memory Lock bits, and Fuse bits in the ATtiny2313. Pulses are assumed to be at
least 250 ns unless otherwise noted.
In this section, some pins of the ATtiny2313 are referenced by signal names describing their
functionality during parallel programming, see
following table are referenced by pin names.
The XA1/XA0 pins determine the action executed when the XTAL1 pin is given a positive pulse.
The bit coding is shown in
When pulsing WR or OE, the command loaded determines the action executed. The different
Commands are shown in
Figure 69. Parallel Programming
Table 71. Pin Name Mapping
Programming
BS1/PAGEL
Signal Name
RDY/BSY
Mode
WR
OE
in
Name
PD1
PD2
PD3
PD4
Pin
BS1/PAGEL
Table
Table
RDY/BSY
XA1/BS2
+12 V
I/O
O
XA0
I
I
I
WR
OE
74.
73.
0: Device is busy programming, 1: Device is ready for
new command.
Output Enable (Active low).
Write Pulse (Active low).
Byte Select 1 (“0” selects low byte, “1” selects high
byte).
Program Memory and EEPROM Data Page Load.
Function
PD1
PD2
PD3
PD4
PD5
PD6
RESET
XTAL1
GND
Figure 69
PB7 - PB0
VCC
and
+5V
Table
DATA I/O
71. Pins not described in the
161