PIC18F44K20-I/PT Microchip Technology, PIC18F44K20-I/PT Datasheet - Page 388

• Manufacturer Part Number: PIC18F44K20-I/PT
• Description: IC PIC MCU FLASH 8KX16 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F44K20-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 16KB (8K x 16)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: CCP/ECCP/EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 4
• Operating Supply Voltage: 3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 14-ch x 10-bit
• Package: 44TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 64 MHz
• Height: 1 mm
• Length: 10 mm
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 1.8 V
• Width: 10 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPDM164124 - KIT STARTER FOR PIC18F4XK20AC164305 - MODULE SKT FOR PM3 44TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F2XK20/4XK20
FIGURE 26-11:
TABLE 26-13: PARALLEL SLAVE PORT REQUIREMENTS (PIC18F4XK20)
DS41303D-page 386
62
63
64
65
66
Param.
No.
Note:
RD7:RD0
RE1/WR
RE0/RD
RE2/CS
TdtV2wrH
TwrH2dtI
TrdL2dtV
TrdH2dtI
TibfINH
Symbol
Refer to Figure 26-4 for load conditions.
PARALLEL SLAVE PORT TIMING (PIC18F4XK20)
Data In Valid before WR ↑ or CS ↑
(setup time)
WR ↑ or CS ↑ to Data–In Invalid (hold time)
RD ↓ and CS ↓ to Data–Out Valid
RD ↑ or CS ↓ to Data–Out Invalid
Inhibit of the IBF Flag bit being Cleared from
WR ↑ or CS ↑
64
Characteristic
65
Preliminary
Min
20
20
10
—
—
3 T
Max
62
80
30
—
—
CY
© 2008 Microchip Technology Inc.
Units
63
ns
ns
ns
ns
Conditions