DSPIC30F3012-20I/SO Microchip Technology, DSPIC30F3012-20I/SO Datasheet - Page 4

• Manufacturer Part Number: DSPIC30F3012-20I/SO
• Description: IC DSPIC MCU/DSP 24K 18SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F3012-20I/SO

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 12
• Program Memory Size: 24KB (8K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 18-SOIC (7.5mm Width)
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 12
• Flash Memory Size: 24KB
• Supply Voltage Range: 2.5V To 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILAC30F005 - MODULE SCKT DSPIC30F 18DIP/SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F301220ISO

dsPIC30F3012/3013
Silicon Errata Issues
1. Module: CPU
DS80448D-page 4
Note:
Sequential MAC class instructions, which prefetch
data from Y data space using ±4 address
modification cause an address error trap. The trap
occurs only when all the following conditions are
true:
1. Two sequential MAC class instructions (or a
2. Both instructions prefetch data from Y data
3. Neither of the instruction uses an accumulator
Work around
The problem described above can be avoided by
using any of the following methods:
1. Inserting any other instruction between the two
2. Adding an accumulator write back (a dummy
3. Do not use the + = 4 or - = 4 address
4. Do not prefetch data from Y data space.
Affected Silicon Revisions
B0
X
MAC class instruction executed in a REPEAT or
DO loop) that prefetch from Y data space.
space using the + = 4 or - = 4 address
modification.
write back.
MAC class instructions.
write back if needed) to either of the MAC class
instructions.
modification.
This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated by the shaded column in
the following tables apply to the current
silicon revision (B1).
B1
X
2. Module: CPU
EXAMPLE 1:
L0:DAW.b
L1: ....
The Decimal Adjust instruction, DAW.b, may
improperly clear the Carry bit, C (SR<0>), when
executed.
Work around
Check the Carry bit status before executing the
DAW.b instruction. If the Carry bit is set, set the
Carry bit again after executing the DAW.b
instruction. Example 1 shows how the application
should process the Carry bit during a BCD addition
operation.
Affected Silicon Revisions
B0
.include “p30f3013.inc”
.......
MOV.b
MOV.b
ADD.b
BRA
DAW.b
BSET.b SR, #C
BRA
X
B1
X
#0x80, w0
#0x80, w1
w0, w1, w2 ;Perform addition
NC, L0
w2
L1
w2
CHECK CARRY BIT BEFORE
DAW.b
© 2010 Microchip Technology Inc.
;First BCD number
;Second BCD number
;If C set go to L0
;If not,do DAW and
;set the carry bit
;and exit