PIC18F452-I/ML Microchip Technology, PIC18F452-I/ML Datasheet - Page 40

• Manufacturer Part Number: PIC18F452-I/ML
• Description: IC MCU FLASH 16KX16 A/D 44QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F452-I/ML

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Controller Family/series: PIC18
• No. Of I/o's: 34
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 1.5KB
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIP444-1001 - DEMO BOARD FOR PICMICRO MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18FXX2
REGISTER 4-1:
FIGURE 4-3:
4.2.3
Since the Top-of-Stack (TOS) is readable and writable,
the ability to push values onto the stack and pull values
off the stack without disturbing normal program execu-
tion is a desirable option. To push the current PC value
onto the stack, a PUSH instruction can be executed.
This will increment the stack pointer and load the cur-
rent PC value onto the stack. TOSU, TOSH and TOSL
can then be modified to place a return address on the
stack.
The ability to pull the TOS value off of the stack and
replace it with the value that was previously pushed
onto the stack, without disturbing normal execution, is
achieved by using the POP instruction. The POP instruc-
tion discards the current TOS by decrementing the
stack pointer. The previous value pushed onto the
stack then becomes the TOS value.
DS39564C-page 38
bit 7
bit 6
bit 5
bit 4-0
PUSH AND POP INSTRUCTIONS
(1)
(1)
TOSU
RETURN ADDRESS STACK AND ASSOCIATED REGISTERS
STKPTR REGISTER
0x00
bit 7
STKOVF: Stack Full Flag bit
1 = Stack became full or overflowed
0 = Stack has not become full or overflowed
STKUNF: Stack Underflow Flag bit
1 = Stack underflow occurred
0 = Stack underflow did not occur
Unimplemented: Read as '0'
SP4:SP0: Stack Pointer Location bits
Legend:
R = Readable bit
- n = Value at POR
STKOVF
R/C-0
Note 1: Bit 7 and bit 6 can only be cleared in user software or by a POR.
STKUNF
TOSH
0x1A
R/C-0
Top of Stack
TOSL
U-0
0x34
—
W = Writable bit
’1’ = Bit is set
Return Address Stack
R/W-0
SP4
0x001A34
0x000D58
4.2.4
These resets are enabled by programming the
STVREN configuration bit. When the STVREN bit is
disabled, a full or underflow condition will set the appro-
priate STKFUL or STKUNF bit, but not cause a device
RESET. When the STVREN bit is enabled, a full or
underflow will set the appropriate STKFUL or STKUNF
bit and then cause a device RESET. The STKFUL or
STKUNF bits are only cleared by the user software or
a POR Reset.
R/W-0
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
SP3
STACK FULL/UNDERFLOW RESETS
11111
11110
11101
00011
00010
00001
00000
STKPTR<4:0>
R/W-0
SP2
© 2006 Microchip Technology Inc.
00010
x = Bit is unknown
R/W-0
SP1
R/W-0
SP0
bit 0