C8051F560-IQ Silicon Laboratories Inc, C8051F560-IQ Datasheet - Page 300

• Manufacturer Part Number: C8051F560-IQ
• Description: IC 8051 MCU 32K FLASH 32-QFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F56xr

Specifications of C8051F560-IQ

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 32-QFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: SMBus (2-Wire/I²C), CAN, LIN, SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 25
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.25 V
• Data Converters: A/D 25x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: C8051F5x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 2304 B
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 25
• Operating Supply Voltage: 1.8 V to 5.25 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F560DK
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1691 - KIT DEVELOPMENT FOR C8051F560
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1693

C8051F55x/56x/57x
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Revision 0.5 to Revision 1.0
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Note: All items from the C8051F55x-F56x-57x Errata dated November 5th, 2009 are incorporated into this data sheet.
Revision 1.0 to Revision 1.1
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300
OCUMENT
Updated “2. Ordering Information” to include -A (Automotive) devices and automotive qualification
information.
Updated Figure 4.8 on page 35.
Updated supply current related specifications throughout “5. Electrical Characteristics” .
Updated SFR Definition 7.1 to change VREF high setting to 2.20 V from 2.25 V.
Updated Figure 8.1 to indicate that Comparators are powered from V
Updated the Gain Table in “6.3.1. Calculating the Gain Value” to fix the ADC0GNH Value in the last
row.
Updated Table 10.1 with correct timing for all branch instructions, MOVC, and CPL A.
Updated “14.2. Non-volatile Data Storage” to clarify behavior of 8-bit MOVX instructions and when
writing/erasing Flash.
Updated SFR Definition 14.3 (FLSCL) to include FLEWT bit definition. This bit must be set before
writing or erasing Flash. Also updated Table 5.5 to reflect new Flash Write and Erase timing.
Updated “16.7. Flash Error Reset” with an additional cause of a Flash Error reset.
Updated “19.1.3. Interfacing Port I/O in a Multi-Voltage System” to remove note regarding interfacing to
voltages above VIO.
Updated “22. SMBus” to remove all hardware ACK features, including SMB0ADM and SMB0ADR
SFRs.
Updated SFR Definition 23.1 (SCON0) to correct SFR Page to 0x00 from All Pages.
Updated “1. System Overview” with a voltage range specification for the internal oscillator.
Updated Table 5.6, “Internal High-Frequency Oscillator Electrical Characteristics,” on page 42 with new
conditions for the internal oscillator accuracy. The internal oscillator accuracy is dependent on the
operating voltage range.
Updated “5. Electrical Characteristics” to remove the internal oscillator curve across temperature
diagram.
Updated Figure 6.4 on Page 51 with new timing diagram when using CNVSTR pin.
Updated SFR Definition 7.1 (REF0CN) with oscillator suspend requirement for ZTCEN.
Fixed incorrect cross references in “8. Comparators” .
Updated SFR Definition 9.1 (REG0CN) with a new definition for Bit 6. The bit 6 reset value is 1b and
must be written to 1b.
Update “15.3. Suspend Mode” with note regarding ZTCEN.
Added Port 2 Event and Port 3 Events to wake-up sources in “18.2.1. Internal Oscillator Suspend
Mode”
Updated “20. Local Interconnect Network (LIN0)” with a voltage range specification for the internal
oscillator.
Updated LIN Register Definitions 20.9 and 20.10 with correct reset values.
Updated “21. Controller Area Network (CAN0)” with a voltage range specification for the internal
oscillator.
Updated C2 Register Definitions 27.2 and 27.3 with correct C2 and SFR Addresses.
C
HANGE
L
IST
Rev. 1.1
IO
and not V
DDA
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