DS80C323-QCD+ Maxim Integrated Products, DS80C323-QCD+ Datasheet - Page 3

• Manufacturer Part Number: DS80C323-QCD+
• Description: IC MCU HI SPEED 18MHZ 44-PLCC
• Manufacturer: Maxim Integrated Products
• Series: 80Cr

Specifications of DS80C323-QCD+

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 18MHz
• Connectivity: EBI/EMI, SIO, UART/USART
• Peripherals: Power-Fail Reset, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-LCC, 44-PLCC
• Processor Series: DS80C323
• Core: 8051
• Data Bus Width: 8 bit
• Program Memory Size: 64 KB
• Data Ram Size: 64 KB
• Interface Type: UART
• Maximum Clock Frequency: 18 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Figure 1. Block Diagram
PIN DESCRIPTION
DIP
18
19
29
40
20
9
PLCC
22, 23
20
21
44
10
32
PIN
TQFP
16, 17
38
14
15
26
4
XTAL2
XTAL1
NAME
GND
RST
PSEN
V
CC
+5V (+3V for DS80C323)
Digital Circuit Ground
Reset Input. The RST input pin contains a Schmitt voltage input to
recognize external active-high reset inputs. The pin also employs an
internal pulldown resistor to allow for a combination of wired OR
external reset sources. An RC is not required for power-up, as the device
provides this function internally.
Crystal Oscillator Pins. XTAL1 and XTAL2 provide support for
parallel-resonant, AT-cut crystals. XTAL1 acts also as an input in the
event that an external clock source is used in place of a crystal. XTAL2
serves as the output of the crystal amplifier.
Program Store-Enable Output, Active Low. This signal is commonly
connected to external ROM memory as a chip enable.
active-low pulse width of 2.25 XTAL1 cycles with a period of four
XTAL1 cycles.
accessed through the bus and during a reset condition.
DS80C320/DS80C323 High-Speed/Low-Power Microcontrollers
3 of 38
PSEN
is driven high when data memory (RAM) is being
DS80C320/
DS80C323
FUNCTION
PSEN
provides an