MCIMX512DJM8C Freescale Semiconductor, MCIMX512DJM8C Datasheet - Page 112

• Manufacturer Part Number: MCIMX512DJM8C
• Description: MULTIMEDIA PROC 529-LFBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX51r

Specifications of MCIMX512DJM8C

• Core Processor: ARM Cortex-A8
• Core Size: 32-Bit
• Speed: 800MHz
• Connectivity: 1-Wire, EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 128
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.8 V ~ 1.15 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 529-LFBGA
• Processor Series: i.MX51
• Core: ARM Cortex A8
• Data Bus Width: 32 bit
• Program Memory Size: 36 KB
• Data Ram Size: 128 KB
• Interface Type: I2C, SPI, SSI, UART, USB
• Maximum Clock Frequency: 200 MHz
• Number Of Timers: 5
• Operating Supply Voltage: 0.8 V to 1.15 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: MCIMX51EVKJ
• Minimum Operating Temperature: - 20 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Electrical Characteristics
4.7.9
Figure 67
Figure 68
112
15
DISP_CS_DOWN is predefined in REGISTER.
Display RS down time
OW1
OW2
OW3
OW4
One-Wire bus
(BATT_LINE)
OW5
OW6
ID
ID
depicts the RPP timing and
depicts Write 0 Sequence timing, and
1-Wire Timing Parameters
Reset Time Low
Presence Detect High
Presence Detect Low
Reset Time High
One-Wire bus
(BATT_LINE)
Write 0 Low Time
Transmission Time Slot
i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 4
Table 86. RPP Sequence Delay Comparisons Timing Parameters
Figure 67. Reset and Presence Pulses (RPP) Timing Diagram
Parameters
Parameter
“Reset Pulse”
1-WIRE Tx
Figure 68. Write 0 Sequence Timing Diagram
Table 87. WR0 Sequence Timing Parameters
Tdicdcs
OW1
Table 86
=
(
T DI_CLK
lists the RPP timing parameters.
Table 87
Symbol
t
OW5
t
×
t
RSTH
t
RSTL
PDH
t
PDL
Symbol
WR0_low
ceil
t
SLOT
)
DISP_CS_DOWN_#
------------------------------------------------------
lists the timing parameters.
DI_CLK_PERIOD
OW6
OW3
OW2
Min
480
480
15
60
“Presence Pulse”
OW5
Min
60
DS2502 Tx
Typ
512
511
—
—
OW4
Typ
100
117
Freescale Semiconductor
Max
240
60
—
—
Max
120
120
Unit
Unit
µs
µs
µs
µs
µs
µs