MCIMX512DJM8C Freescale Semiconductor, MCIMX512DJM8C Datasheet - Page 22

• Manufacturer Part Number: MCIMX512DJM8C
• Description: MULTIMEDIA PROC 529-LFBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX51r

Specifications of MCIMX512DJM8C

• Core Processor: ARM Cortex-A8
• Core Size: 32-Bit
• Speed: 800MHz
• Connectivity: 1-Wire, EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 128
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.8 V ~ 1.15 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 529-LFBGA
• Processor Series: i.MX51
• Core: ARM Cortex A8
• Data Bus Width: 32 bit
• Program Memory Size: 36 KB
• Data Ram Size: 128 KB
• Interface Type: I2C, SPI, SSI, UART, USB
• Maximum Clock Frequency: 200 MHz
• Number Of Timers: 5
• Operating Supply Voltage: 0.8 V to 1.15 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: MCIMX51EVKJ
• Minimum Operating Temperature: - 20 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Electrical Characteristics
22
Stop Mode
Stop Mode
Stop Mode
• External reference clocks
• Power gating for ARM and
• HPM voltage
• External reference clocks
• Power gating for ARM and
• HPM voltage
• External reference clocks
• No power gating for ARM and
• HPM voltage
gated
processing units
enabled
processing units
enabled
processing units
Mode
Table 16. i.MX51 Stop Mode Current and Power Consumption (continued)
i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 4
VDDGP = 1.1 V, VCC = 1.225 V, VDDA = 1.2 V
ARM CORE in SRPG mode
L1 and L2 caches power gated
IPU in S&RPG mode
VPU and GPU in PG mode
All PLLs off, all CCM-generated clocks off
CKIL input on with 32 kHz signal present
All modules disabled.
USBPHY PLL off
External (MHz) crystal and on-chip oscillator
powered down (SBYOS bit asserted)
No external resistive loads that cause current flow
T
VDDGP = 1.1 V, VCC = 1.225 V, VDDA = 1.20 V
ARM CORE in SRPG mode
L1 and L2 caches power gated
IPU in S&RPG mode
VPU and GPU in PG mode
All PLLs off, all CCM-generated clocks off
CKIL input on with 32 kHz signal present
All modules disabled
USBPHY PLL off
External (MHz) crystal and on-chip oscillator pow-
ered and generating reference clock
No external resistive loads that cause current flow
T
VDDGP = 1.1 V, VCC = 1.225 V, VDDA = 1.2 V
All PLLs off, all CCM-generated clocks off
CKIL input on with 32 kHz signal present
All modules disabled
USBPHY PLL off
External (MHz) crystal and on-chip oscillator
powered and generating reference clock
No external resistive loads that cause current flow
T
A
A
A
= 25°C
= 25 °C
= 25 °C
Condition
NVCC_OSC
NVCC_OSC
NVCC_OSC
VDDGP
VDDGP
VDDGP
Supply
VDDA
VDDA
VDDA
VCC
Total
VCC
Total
VCC
Total
Freescale Semiconductor
Nominal
0.012
0.24
0.45
1.09
0.24
0.45
1.15
0.2
0.2
1.5
4.8
1.5
50
63
2
Unit
mW
mW
mW
mA
mA
mA