PIC18F25J10-I/SO Microchip Technology, PIC18F25J10-I/SO Datasheet - Page 155
![IC PIC MCU FLASH 16KX16 28SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
PIC18F25J10-I/SO
Manufacturer Part Number
PIC18F25J10-I/SO
Description
IC PIC MCU FLASH 16KX16 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F24J10-ISO.pdf
(368 pages)
3.PIC18F24J10-ISO.pdf
(6 pages)
4.PIC18F24J10-ISO.pdf
(6 pages)
5.PIC18F24J10-ISO.pdf
(12 pages)
6.PIC18LF24J10-ISS.pdf
(32 pages)
7.PIC18F44J10-IPT.pdf
(358 pages)
Specifications of PIC18F25J10-I/SO
Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI/I2C/MSSP/USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183022, DM183032, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10-ch x 10-bit
Package
28SOIC W
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MILAC162074 - HEADER INTRFC MPLAB ICD2 44TQFPMA180011 - MODULE PLUG-IN 18F25J10 28SOICAC162067 - HEADER INTRFC MPLAB ICD2 40/28PAC164331 - MODULE SKT FOR 28SSOP 18F45J10
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC18F24J10-ISO PDF datasheet #2
- PIC18F24J10-ISO PDF datasheet #3
- PIC18F24J10-ISO PDF datasheet #4
- PIC18F24J10-ISO PDF datasheet #5
- PIC18LF24J10-ISS PDF datasheet #6
- PIC18F44J10-IPT PDF datasheet #7
- Current page: 155 of 368
- Download datasheet (6Mb)
16.3.3
To enable the serial port, MSSP Enable bit, SSPEN
(SSPxCON1<5>), must be set. To reset or reconfigure
SPI mode, clear the SSPEN bit, reinitialize the
SSPxCON registers and then set the SSPEN bit. This
configures the SDIx, SDOx, SCKx and SSx pins as
serial port pins. For the pins to behave as the serial port
function, some must have their data direction bits (in
the TRIS register) appropriately programmed as
follows:
• SDIx is automatically controlled by the SPI module
• SDOx must have TRISC<5> (or TRISD<2>) bit
• SCKx (Master mode) must have TRISC<3> (or
• SCKx (Slave mode) must have TRISC<3> (or
• SSx must have TRISA<5> (or TRISD<3>) bit set
FIGURE 16-2:
© 2009 Microchip Technology Inc.
cleared
TRISD<0>) bit cleared
TRISD<0>) bit set
ENABLING SPI I/O
SPI Master SSPM<3:0> = 00xxb
MSb
PROCESSOR 1
Serial Input Buffer
SPI MASTER/SLAVE CONNECTION
Shift Register
(SSPxBUF)
(SSPxSR)
LSb
SDOx
SCKx
SDIx
Serial Clock
PIC18F45J10 FAMILY
Any serial port function that is not desired may be
overridden by programming the corresponding data
direction (TRIS) register to the opposite value.
16.3.4
Figure 16-2 shows a typical connection between two
microcontrollers. The master controller (Processor 1)
initiates the data transfer by sending the SCKx signal.
Data is shifted out of both shift registers on their pro-
grammed clock edge and latched on the opposite edge
of the clock. Both processors should be programmed to
the same Clock Polarity (CKP), then both controllers
would send and receive data at the same time.
Whether the data is meaningful (or dummy data)
depends on the application software. This leads to
three scenarios for data transmission:
• Master sends data – Slave sends dummy data
• Master sends data – Slave sends data
• Master sends dummy data – Slave sends data
SDOx
SCKx
SDIx
TYPICAL CONNECTION
SPI Slave SSPM<3:0> = 010xb
MSb
Serial Input Buffer
Shift Register
(SSPxBUF)
PROCESSOR 2
(SSPxSR)
LSb
DS39682E-page 153
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