PIC16F785-I/ML Microchip Technology, PIC16F785-I/ML Datasheet
PIC16F785-I/ML
Specifications of PIC16F785-I/ML
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PIC16F785-I/ML Summary of contents
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... SS Legend Input, I/O = Input/Output Power Note 1: In the PIC16F785/HV785, the programming high voltage is internally generated. To activate the Program/ Verify mode, high voltage needs to be applied to MCLR input. Since the MCLR is used for a level source, MCLR does not draw significant current. 2009 Microchip Technology Inc. ...
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... PIC16F785/HV785 FIGURE 1-1: 20-PIN DIAGRAM FOR PIC16F785/HV785 PDIP, SOIC, SSOP V RA5/T1CKI/OSC1/CLKIN RA4/AN3/T1G/OSC2/CLKOUT RA3/MCLR/V RC5/CCP1 RC4/C2OUT/PH2 RC3/AN7/C12IN3-/OP1 RC6/AN8/OP1- RC7/AN9/OP1+ RB7/SYNC FIGURE 1-2: 20-PIN DIAGRAM FOR PIC16F785/HV785 QFN RA3/MCLR/V PP RC5/CCP1 RC4/C2OUT/PH2 RC3/AN7/C12IN3-/OP1 RC6/AN8/OP1- DS41237D-page RA0/AN0/C1IN+/ICSPDAT 3 18 RA1/AN1/C12IN0-/ RA2/AN2/T0CKI/INT/C1OUT RC0/AN4/C2IN RC1/AN5/C12IN1-/PH1 ...
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... SHNTREG 1 28 ICDCLK ICDMCLR ICDDATA Vss DD RA5 4 25 RA0 RA4 RA1 5 24 RA3 RA2 6 23 RC5 7 22 RC0 RC4 8 21 RC1 RC3 9 20 RC2 RC6 RB4 10 19 RC7 11 18 RB5 RB7 RB6 12 17 ICD 2009 Microchip Technology Inc. PIC16F785/HV785 DS41237D-page 3 ...
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... PIC16F785/HV785 2.0 MEMORY DESCRIPTION 2.1 Program Memory Map The user memory space extends from 0x0000 to 0x1FFF, with addresses 0x0000-0x07FF implemented. In Program/Verify mode, the program memory space extends from 0x0000 to 0x3FFF, with the first half (0x0000-0x1FFF) being user program memory and the second half (0x2000-0x3FFF) being configuration memory ...
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... User ID Location 2004 Reserved Reserved 2005 Device ID 2006 Configuration Word 2007 Calibration Word 2008 2009 Calibration Word 2009-203F Reserved 2009 Microchip Technology Inc. PIC16F785/HV785 2 K Implemented 07FF Program Memory Maps to 0-7FF 1FFF 2000 Implemented 2040 Configuration Memory Unimplemented 3FFF DS41237D-page 5 ...
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... PIC16F785/HV785 3.0 PROGRAM/VERIFY MODE Two methods are available to enter Program/Verify mode. The ‘V -first’ method is entered by holding PP ICSPDAT and ICSPCLK low while raising MCLR pin from (high voltage), then applying V IL IHH data. This method can be used for any Configuration Word selection and must be used if the INTOSC and internal MCLR options are selected (FOSC< ...
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... Program/Erase Algorithms The PIC16F785/HV785 program memory may be written in two ways. The fastest method writes four words at a time. However, one-word writes are also supported for backward compatibility with previous 8- pin and 14-pin Flash devices. The four-word algorithm is used to program the program memory and the user ID locations only ...
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... PIC16F785/HV785 3.1.4 ERASE ALGORITHMS The PIC16F785/HV785 will erase different memory locations depending on the Program Counter (PC), CP and CPD values, and which erase command is executed. The following sequences can be used to erase noted memory locations. In each sequence, the data memory will be erased if the CPD bit in the Configuration Word is programmed (clear) ...
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... SET T 1 HLD 2009 Microchip Technology Inc. PIC16F785/HV785 After the 6-bit command is input, ICSPCLK pin is cycled an additional 16 times for the Start bit, 14 bits of data and a Stop bit (see Figure 3-4). After the configuration memory is entered, the only way to get back to the program memory is to exit the ...
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... PIC16F785/HV785 3.1.5.3 Load Data for Data Memory After receiving this command, the device will load in a 14-bit ‘data word’ when 16 cycles are applied. However, the data memory is only 8 bits wide and thus, only the first 8 bits of data after the Start bit will be programmed into the data memory ...
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... A timing diagram of this command is shown in Figure 3- not possible to decrement the address counter. To reset this counter, the user should exit and re-enter Program/Verify mode. FIGURE 3-9: INCREMENT ADDRESS COMMAND (PROGRAM/VERIFY ICSPCLK ICSPDAT 0 2009 Microchip Technology Inc. PIC16F785/HV785 T 2 DLY DLY 0 ...
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... PIC16F785/HV785 3.1.5.7 Begin Programming (Internally Timed) A Load command must be given before every Begin Programming command. Programming appropriate memory (user program configuration memory or data memory) will begin after this command is received and decoded. An internal timing mechanism executes a write. The user must allow for program cycle time for programming to complete ...
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... Section 3.1.4 “Erase Algorithms” sequences. Note: All Bulk Erase operations must take place between 4.5V and 5.5V PIC16F785, 2.0V to 5.5V V PIC16F785-ICD and 4.5V to 4.9V for PIC16HV785. FIGURE 3-13: BULK ERASE PROGRAM MEMORY COMMAND 1 ICSPCLK 1 ICSPDAT 2009 Microchip Technology Inc. PIC16F785/HV785 . ...
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... If CPD = 0, a Bulk Erase program memory must be used. Note: All Bulk Erase operations must take place between 4.5V and 5.5V PIC16F785, 2.0V to 5.5V V PIC16F785-ICD and 4.5V to 4.9V for PIC16HV785. FIGURE 3-14: BULK ERASE DATA MEMORY COMMAND 1 ICSPCLK ICSPDAT 1 DS41237D-page 14 Configuration Memory Space ...
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... Wait T to complete a row erase. ERA Note: All row erase operations must take place between 4.5V and 5.5V PIC16F785, 2.0V to 5.5V V PIC16F785-ICD and 4.5V to 4.9V for PIC16HV785. FIGURE 3-15: ROW ERASE PROGRAM MEMORY COMMAND 1 ICSPCLK ICSPDAT 1 2009 Microchip Technology Inc. PIC16F785/HV785 ...
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... PIC16F785/HV785 FIGURE 3-16: ONE-WORD PROGRAMMING FLOWCHART Start Read and Store Calibration Memory Values (Figure 3-21) (1) Device Bulk Erase (Figure 3-20) One-word Program Cycle Read Data From Program Memory Data Correct? Yes Increment No All Locations Address Done? Command Yes Exit Program Verify Mode ...
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... Program User ID/Config. bits (Figure 3-18) Read and Verify Calibration Memory Values (Figure 3-21) Done Note 1: This step is optional if device is erased or not previously programmed. 2009 Microchip Technology Inc. PIC16F785/HV785 (1) Yes Begin Programming Command (internally timed) Wait T Program Cycle Load Data ...
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... PIC16F785/HV785 FIGURE 3-18: PROGRAM FLOWCHART – PIC16F785/HV785 CONFIGURATION MEMORY Start Load Configuration Data One-word Program Cycle (User ID) Read Data From Program Memory Command No Programming Data Correct? Yes Increment Address Command No Address = Yes 0x2004? Program Cycle Read Data From Program Memory DS41237D-page 18 ...
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... FIGURE 3-19: PROGRAM FLOWCHART – PIC16F785/HV785 DATA MEMORY Start Program Cycle Read Data From Program Memory Command Data Correct? Yes Increment No All Locations Address Done? Command Yes Done 2009 Microchip Technology Inc. PIC16F785/HV785 Begin Programming Command (internally timed) Wait T PROG ...
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... PIC16F785/HV785 FIGURE 3-20: PROGRAM FLOWCHART – ERASE FLASH DEVICE DS41237D-page 20 Start Read and Store Calibration Memory Values (Figure 3-21) Load Configuration Bulk Erase Program Memory Bulk Erase Data Memory Read and Verify Calibration Memory Values (Figure 3-21) Done 2009 Microchip Technology Inc. ...
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... Note 1: This step is not required for the Read and Store Calibration Memory Values procedure. 2: The device should not be used if verification of the Calibration Word locations fails. This information should be reported to the user through the user interface of the device programmer. 2009 Microchip Technology Inc. PIC16F785/HV785 Start Load Configuration Increment Address ...
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... PIC16F785/HV785 4.0 CONFIGURATION WORD The PIC16F785/HV785 has several Configuration bits. These bits can be programmed (reads ‘0’) or left unchanged (reads ‘1’) to select various device configurations. REGISTER 4-1: CONFIG: CONFIGURATION WORD (ADDRESS: 2007h) U-1 U-1 R/P-1 – – FCMEN bit 13 R/P-1 ...
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... If the HS, XT oscillator fails In Fail-Safe mode the Watchdog time-out can occur only once after which it will be disabled until the oscillator is restored.. 4.1 Device ID Word The device ID word for the PIC16F785/HV785 is located at 2006h. This location cannot be erased. TABLE 4-1: DEVICE ID VALUES Device ID Values ...
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... PIC16F785/HV785 5.0 CODE PROTECTION For the PIC16F785/HV785, once the CP bit is programmed to ‘0’, all program memory locations read all ‘0’s. The user ID locations and the Configuration Word read out in an unprotected fashion. Further programming is disabled for the entire program memory. ...
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... The 256 data memory locations are logically mapped starting at address 0x2100. The format for data memory storage is one data byte per address location, LSb aligned. 2009 Microchip Technology Inc. PIC16F785/HV785 Checksum* SUM[0x0000:0x7FF] + CFGW & 0FFF CFGW & 0x0FFF + SUM_ID 0x25E6 at 0 Blank and Max ...
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... A 5.5V DD Units Conditions/Comments V PIC16F785/PIC16F785-ICD V PS200 V PIC16F785-ICD V PIC16F785 V PIC16HV785 V s s Program memory Data memory 10°C T +40° Program memory s 2009 Microchip Technology Inc. ...
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... REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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