ATTINY261-15MZ Atmel, ATTINY261-15MZ Datasheet - Page 86

• Manufacturer Part Number: ATTINY261-15MZ
• Description: MCU AVR 2K FLASH 15MHZ 32-QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY261-15MZ

• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Number Of I /o: 16
• Eeprom Size: 128 x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Program Memory Size: 2KB (2K x 8)
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Connectivity: USI
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14.10.2
14.10.3
14.10.4
14.10.5
86
ATtiny261/ATtiny461/ATtiny861
TCNT0L – Timer/Counter0 Register Low Byte
TCNT0H – Timer/Counter0 Register High Byte
OCR0A – Timer/Counter0 Output Compare Register A
OCR0B – Timer/Counter0 Output Compare Register B
Modes of operation supported by the Timer/Counter unit are: Normal mode (counter) and Clear
Timer on Compare Match (CTC) mode (see
The Timer/Counter0 Register Low Byte, TCNT0L, gives direct access, both for read and write
operations, to the Timer/Counter unit 8-bit counter. Writing to the TCNT0L Register blocks (dis-
ables) the Compare Match on the following timer clock. Modifying the counter (TCNT0L) while
the counter is running, introduces a risk of missing a Compare Match between TCNT0L and the
OCR0x Registers. In 16-bit mode the TCNT0L register contains the lower part of the 16-bit
Timer/Counter0 Register.
When 16-bit mode is selected (the TCW0 bit is set to one) the Timer/Counter Register TCNT0H
combined to the Timer/Counter Register TCNT0L gives direct access, both for read and write
operations, to the Timer/Counter unit 16-bit counter. To ensure that both the high and low bytes
are read and written simultaneously when the CPU accesses these registers, the access is per-
formed using an 8-bit temporary high byte register (TEMP). This temporary register is shared by
all the other 16-bit registers. See
The Output Compare Register A contains an 8-bit value that is continuously compared with the
counter value (TCNT0L). A match can be used to generate an Output Compare interrupt.
In 16-bit mode the OCR0A register contains the low byte of the 16-bit Output Compare Register.
To ensure that both the high and the low bytes are written simultaneously when the CPU writes
to these registers, the access is performed using an 8-bit temporary high byte register (TEMP).
This temporary register is shared by all the other 16-bit registers. See
16-bit Mode” on page
The Output Compare Register B contains an 8-bit value that is continuously compared with the
counter value (TCNT0L in 8-bit mode and TCNTH in 16-bit mode). A match can be used to gen-
erate an Output Compare interrupt.
Bit
0x32 (0x52)
Read/Write
Initial Value
Bit
0x14 (0x34)
Read/Write
Initial Value
Bit
0x13 (0x33)
Read/Write
Initial Value
Bit
0x12 (0x32)
Read/Write
Initial Value
R/W
R/W
R/W
R/W
7
0
7
0
7
0
7
0
81.
R/W
R/W
R/W
R/W
6
0
6
0
6
0
6
0
“Accessing Registers in 16-bit Mode” on page 81
R/W
R/W
R/W
R/W
5
0
5
0
5
0
5
0
R/W
R/W
R/W
R/W
“Modes of Operation” on page
4
0
4
0
4
0
4
0
TCNT0L[7:0]
TCNT0H[7:0]
OCR0A[7:0]
OCR0B[7:0]
R/W
R/W
R/W
R/W
3
0
3
0
3
0
3
0
R/W
R/W
R/W
R/W
2
0
2
0
2
0
2
0
R/W
R/W
R/W
R/W
“Accessing Registers in
1
0
1
0
1
0
1
0
75).
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
7753F–AVR–01/11
TCNT0L
TCNT0H
OCR0A
OCR0B