ATMEGA16A-MUR Atmel, ATMEGA16A-MUR Datasheet - Page 132

• Manufacturer Part Number: ATMEGA16A-MUR
• Description: MCU AVR 16KB FLASH 16MHZ 44QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA16A-MUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

132
ATmega16A
Table 17-4
mode.
Table 17-4.
Note:
Table 17-5
rect PWM mode
.
Table 17-5.
Note:
• Bit 2:0 – CS22:0: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter, see
17-6.
Table 17-6.
COM21
CS22
COM21
0
0
1
1
0
0
0
0
1
1
1
1
0
0
1
1
1. A special case occurs when OCR2 equals TOP and COM21 is set. In this case, the compare
1. A special case occurs when OCR2 equals TOP and COM21 is set. In this case, the compare
match is ignored, but the set or clear is done at BOTTOM. See
for more details.
match is ignored, but the set or clear is done at TOP. See
124
shows the COM21:0 bit functionality when the WGM21:0 bits are set to fast PWM
shows the COM21:0 bit functionality when the WGM21:0 bits are set to phase cor-
COM20
Compare Output Mode, Fast PWM Mode
Compare Output Mode, Phase Correct PWM Mode
Clock Select Bit Description
for more details.
CS21
0
1
0
1
0
0
1
1
0
0
1
1
COM20
0
1
0
1
Description
Normal port operation, OC2 disconnected.
Reserved
Clear OC2 on compare match when up-counting. Set OC2 on compare match
when downcounting.
Set OC2 on compare match when up-counting. Clear OC2 on compare match
when downcounting.
CS20
0
1
0
1
0
1
0
1
Description
Normal port operation, OC2 disconnected.
Reserved
Clear OC2 on compare match, set OC2 at BOTTOM,
(non-inverting mode)
Set OC2 on compare match, clear OC2 at BOTTOM,
(inverting mode)
Description
No clock source (Timer/Counter stopped).
clk
clk
clk
clk
clk
clk
clk
T
T
T2S
T2S
T2S
T2S
T2S
2
2
S
S
/256 (From prescaler)
/1024 (From prescaler)
/(No prescaling)
/8 (From prescaler)
/32 (From prescaler)
/64 (From prescaler)
/128 (From prescaler)
(1)
“Phase Correct PWM Mode” on page
(1)
“Fast PWM Mode” on page 123
8154B–AVR–07/09
Table