ATMEGA16A-MUR Atmel, ATMEGA16A-MUR Datasheet - Page 72

• Manufacturer Part Number: ATMEGA16A-MUR
• Description: MCU AVR 16KB FLASH 16MHZ 44QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA16A-MUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14.2.2
14.3
14.4
72
Timer/Counter Clock Sources
Counter Unit
ATmega16A
Definitions
(TIMSK). TIFR and TIMSK are not shown in the figure since these registers are shared by other
timer units.
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source on
the T0 pin. The Clock Select logic block controls which clock source and edge the Timer/Counter
uses to increment (or decrement) its value. The Timer/Counter is inactive when no clock source
is selected. The output from the Clock Select logic is referred to as the timer clock (clk
The double buffered Output Compare Register (OCR0) is compared with the Timer/Counter
value at all times. The result of the compare can be used by the waveform generator to generate
a PWM or variable frequency output on the Output Compare Pin (OC0).
Unit” on page 73.
which can be used to generate an output compare interrupt request.
Many register and bit references in this document are written in general form. A lower case “n”
replaces the Timer/Counter number, in this case 0. However, when using the register or bit
defines in a program, the precise form must be used i.e., TCNT0 for accessing Timer/Counter0
counter value and so on.
The definitions in
Table 14-1.
The Timer/Counter can be clocked by an internal or an external clock source. The clock source
is selected by the clock select logic which is controlled by the clock select (CS02:0) bits located
in the Timer/Counter Control Register (TCCR0). For details on clock sources and prescaler, see
“Timer/Counter0 and Timer/Counter1 Prescalers” on page
The main part of the 8-bit Timer/Counter is the programmable bi-directional counter unit.
14-2
Figure 14-2. Counter Unit Block Diagram
BOTTOM
MAX
TOP
shows a block diagram of the counter and its surroundings.
DATA BUS
Definitions
The counter reaches the BOTTOM when it becomes 0x00.
The counter reaches its MAXimum when it becomes 0xFF (decimal 255).
The counter reaches the TOP when it becomes equal to the highest value in the
count sequence. The TOP value can be assigned to be the fixed value 0xFF
(MAX) or the value stored in the OCR0 Register. The assignment is dependent
on the mode of operation.
TCNTn
Table 14-1
for details. The compare match event will also set the Compare Flag (OCF0)
are also used extensively throughout the document.
direction
count
clear
BOTTOM
Control Logic
TOP
TOVn
(Int. Req.)
clk
Tn
86.
Clock Select
( From Prescaler )
Detector
Edge
See “Output Compare
8154B–AVR–07/09
T0
Tn
).
Figure