PIC12C672-04I/SM Microchip Technology, PIC12C672-04I/SM Datasheet - Page 332

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PIC12C672-04I/SM

Manufacturer Part Number
PIC12C672-04I/SM
Description
IC MCU OTP 2KX14 A/D 8-SOIJ
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets

Specifications of PIC12C672-04I/SM

Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Core Processor
PIC
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Controller Family/series
PIC12
No. Of I/o's
6
Ram Memory Size
128Byte
Cpu Speed
4MHz
No. Of Timers
1
Digital Ic Case Style
SOIC
Processor Series
PIC12C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
5
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
8
Data Rom Size
128 B
Height
1.98 mm
Length
5.33 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
3 V
Width
5.38 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT08SO-1 - SOCKET TRANSITION 8SOIC 150/208AC164312 - MODULE SKT FOR PM3 16SOICISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1048 - ADAPTER 8-SOIC TO 8-DIP309-1047 - ADAPTER 8-SOIC TO 8-DIPAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
 Details
PICmicro MID-RANGE MCU FAMILY
17.5
DS31017A-page 17-56
Connection Considerations for I
For standard-mode I
on the following parameters:
• Supply voltage
• Bus capacitance
• Number of connected devices (input current + leakage current)
The supply voltage limits the minimum value of resistor R
current of 3 mA at V
age of V
function of R
limits the maximum value of R
tibility.
The bus capacitance is the total capacitance of wire, connections, and pins. This capacitance lim-
its the maximum value of R
The SMP bit is the slew rate control enabled bit. This bit is in the SSPSTAT register, and controls
the slew rate of the I/O pins when in I
Figure 17-42: Sample Device Configuration for I
NOTE: I
DD
= 5V+10% and V
P
line to which the pull up resistor is also connected.
is shown in Figure 17-42. The desired noise margin of 0.1V
2
C devices with input levels related to V
OLMAX
SDA
SCL
2
C bus devices, the values of resistors R
R
= 0.4V for the specified output stages. For example, with a supply volt-
P
P
2
Preliminary
C Bus
OLMAX
due to the specified rise time
S
. Series resistors are optional, and used to improve ESD suscep-
R
P
= 0.4V at 3 mA, R
2
C mode (master or slave).
R
S
V
DD
DEVICE
R
+ 10%
S
2
C Bus
PMIN
DD
must have one common supply
P
(Figure
= (5.5-0.4)/0.003 = 1.7 k
due to the specified minimum sink
P
and R
17-42).
1997 Microchip Technology Inc.
S
in
Figure 17-42
DD
C
B
for the low level,
= 10 - 400 pF
V
depends
DD
as a

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