PIC12C672-04I/SM Microchip Technology, PIC12C672-04I/SM Datasheet - Page 435

• Manufacturer Part Number: PIC12C672-04I/SM
• Description: IC MCU OTP 2KX14 A/D 8-SOIJ
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12C672-04I/SM

• Core Size: 8-Bit
• Program Memory Size: 3.5KB (2K x 14)
• Core Processor: PIC
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Controller Family/series: PIC12
• No. Of I/o's: 6
• Ram Memory Size: 128Byte
• Cpu Speed: 4MHz
• No. Of Timers: 1
• Digital Ic Case Style: SOIC
• Processor Series: PIC12C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8
• Data Rom Size: 128 B
• Height: 1.98 mm
• Length: 5.33 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 3 V
• Width: 5.38 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT08SO-1 - SOCKET TRANSITION 8SOIC 150/208AC164312 - MODULE SKT FOR PM3 16SOICISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1048 - ADAPTER 8-SOIC TO 8-DIP309-1047 - ADAPTER 8-SOIC TO 8-DIPAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

Section 23. 10-bit A/D Converter
23.7.2
A/D Result Registers
The ADRESH:ADRESL register pair is the location where the 10-bit A/D result is loaded at the
completion of the A/D conversion. This register pair is 16-bits wide. The A/D module gives the
flexibility to left or right justify the 10-bit result in the 16-bit result register. The A/D Format Select
bit (ADFM) controls this justification.
Figure 23-6
shows the operation of the A/D result justifica-
tion. The extra bits are loaded with ‘0’s’. When an A/D result will not overwrite these locations (A/D
disable), these registers may be used as two general purpose 8-bit registers.
Figure 23-6: A/D Result Justification
10-Bit Result
ADFM = 0
ADFM = 1
0
7
7
2 1 0 7
0 7 6 5
0
RESULT
RESULT
0000 00
0000 00
ADRESH
ADRESH
ADRESL
ADRESL
10-bits
10-bits
23
Left Justified
Right Justified
Preliminary
1997 Microchip Technology Inc.
DS31023A-page 23-13