PIC18F45K20-I/P Microchip Technology, PIC18F45K20-I/P Datasheet - Page 195
![IC PIC MCU FLASH 16KX16 40DIP](/photos/6/61/66192/150-40-dip_sml.jpg)
PIC18F45K20-I/P
Manufacturer Part Number
PIC18F45K20-I/P
Description
IC PIC MCU FLASH 16KX16 40DIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18F25K20T-ISS.pdf
(42 pages)
2.PIC18F25K20T-ISS.pdf
(12 pages)
3.PIC18F25K20T-ISS.pdf
(14 pages)
4.PIC18F25K20T-ISS.pdf
(456 pages)
5.PIC18F45K20-IPT.pdf
(78 pages)
6.PIC18F26K20-ISO.pdf
(430 pages)
Specifications of PIC18F45K20-I/P
Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
CCP/ECCP/EUSART/I2C/MSSP/SPI
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
36
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
14-ch x 10-bit
Package
40PDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
64 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240313 - BOARD DEMO 8BIT XLPAC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPDM164124 - KIT STARTER FOR PIC18F4XK20
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F45K20-I/P
Manufacturer:
NEC
Quantity:
2 110
Company:
Part Number:
PIC18F45K20-I/PT
Manufacturer:
SIEMENS
Quantity:
32
Company:
Part Number:
PIC18F45K20-I/PT
Manufacturer:
MICROCHI
Quantity:
18 600
Company:
Part Number:
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Manufacturer:
Microchip Technology
Quantity:
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20 000
- PIC18F25K20T-ISS PDF datasheet
- PIC18F25K20T-ISS PDF datasheet #2
- PIC18F25K20T-ISS PDF datasheet #3
- PIC18F25K20T-ISS PDF datasheet #4
- PIC18F45K20-IPT PDF datasheet #5
- PIC18F26K20-ISO PDF datasheet #6
- Current page: 195 of 430
- Download datasheet (7Mb)
REGISTER 17-2:
© 2008 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3-0
Note 1:
WCOL
R/W-0
2:
3:
In Master mode, the overflow bit is not set since each new reception (and transmission) is initiated by
writing to the SSPBUF register.
When enabled, these pins must be properly configured as input or output.
Bit combinations not specifically listed here are either reserved or implemented in I
WCOL: Write Collision Detect bit (Transmit mode only)
1 = The SSPBUF register is written while it is still transmitting the previous word
0 = No collision
SSPOV: Receive Overflow Indicator bit
SPI Slave mode:
1 = A new byte is received while the SSPBUF register is still holding the previous data. In case of over-
0 = No overflow
SSPEN: Synchronous Serial Port Enable bit
1 = Enables serial port and configures SCK, SDO, SDI and SS as serial port pins. When enabled, the
0 = Disables serial port and configures these pins as I/O port pins
CKP: Clock Polarity Select bit
1 = Idle state for clock is a high level
0 = Idle state for clock is a low level
SSPM<3:0>: Synchronous Serial Port Mode Select bits
0101 = SPI Slave mode, clock = SCK pin, SS pin control disabled, SS can be used as I/O pin
0100 = SPI Slave mode, clock = SCK pin, SS pin control enabled
0011 = SPI Master mode, clock = TMR2 output/2
0010 = SPI Master mode, clock = F
0001 = SPI Master mode, clock = F
0000 = SPI Master mode, clock = F
SSPOV
R/W-0
(must be cleared by software)
flow, the data in SSPSR is lost. Overflow can only occur in Slave mode. The user must read the
SSPBUF, even if only transmitting data, to avoid setting overflow (must be cleared by software).
SDA and SCL pins must be configured as inputs.
SSPCON1: MSSP CONTROL 1 REGISTER (SPI MODE)
W = Writable bit
‘1’ = Bit is set
SSPEN
R/W-0
R/W-0
CKP
Preliminary
OSC
OSC
OSC
(1)
/64
/16
/4
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
(2)
SSPM3
R/W-0
PIC18F2XK20/4XK20
(3)
SSPM2
R/W-0
x = Bit is unknown
SSPM1
R/W-0
2
C mode only.
DS41303D-page 193
SSPM0
R/W-0
bit 0
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