PIC16F916-I/SP Microchip Technology, PIC16F916-I/SP Datasheet - Page 211

• Manufacturer Part Number: PIC16F916-I/SP
• Description: IC PIC MCU FLASH 8KX14 28SDIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F916-I/SP

• Program Memory Type: FLASH
• Program Memory Size: 14KB (8K x 14)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 24
• Eeprom Size: 256 x 8
• Ram Size: 352 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 352 B
• Interface Type: SSP/I2C/AUSART/SPI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164120
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

FIGURE 14-12:
TABLE 14-4:
© 2007 Microchip Technology Inc.
Name
INTCON
LCDCON
LCDSE1
PIE1
PIR1
RCSTA
SSPBUF
SSPCON
SSPSTAT
TRISC
Legend:
Note 1:
SSPCON
SDA
CKP
SCL
WR
Maintain these bits clear.
– = Unimplemented locations, read as ‘0’, u = unchanged, x = unknown. Shaded cells are not used by the SSP module.
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Synchronous Serial Port Receive Buffer/Transmit Register
TRISC7
LCDEN
SMP
WCOL
SPEN
SE15
EEIE
EEIF
Bit 7
GIE
SUMMARY OF REGISTERS ASSOCIATED WITH I
(1)
CLOCK SYNCHRONIZATION TIMING
SSPOV
TRISC6
SLPEN
CKE
SE14
PEIE
ADIE
ADIF
Bit 6
RX9
(1)
TRISC5
SSPEN
DX
WERR
SREN
SE13
RCIE
RCIF
Bit 5
T0IE
D/A
VLCDEN
TRISC4
Master device
asserts clock
CREN
SE12
INTE
TXIE
Bit 4
TXIF
CKP
P
PIC16F913/914/916/917/946
ADDEN
TRISC3
SSPM3
SSPIE
SSPIF
RBIE
SE11
Bit 3
CS1
S
CCP1IE
CCP1IF
TRISC2
SSPM2
FERR
SE10
Bit 2
T0IF
CS0
R/W
Master device
deasserts clock
TMR2IF
TMR2IF
TRISC1
SSPM1
LMUX1
OERR
INTF
Bit 1
SE9
UA
2
C™ OPERATION
TMR1IF
TMR1IF
TRISC0
LMUX0
SSPM0
RX9D
RBIF
Bit 0
SE8
BF
0000 000x
0001 0011
0000 0000
0000 0000
0000 0000
0000 000x
xxxx xxxx
0000 0000
0000 0000
1111 1111
POR, BOR
Value on
DS41250F-page 209
DX-1
Value on all
0000 000x
0001 0011
0000 0000
0000 0000
0000 0000
0000 000x
uuuu uuuu
0000 0000
0000 0000
1111 1111
Resets
other