EP7312-CVZ Cirrus Logic Inc, EP7312-CVZ Datasheet - Page 34

• Manufacturer Part Number: EP7312-CVZ
• Description: IC ARM720T MCU 90/74MHZ 208-LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP7r

Specifications of EP7312-CVZ

• Core Size: 32-Bit
• Core Processor: ARM7
• Speed: 74MHz
• Connectivity: Codec, DAI, EBI/EMI, IrDA, Keypad, SPI/Microwire1, UART/USART
• Peripherals: LCD, LED, MaverickKey, PWM
• Number Of I /o: 27
• Program Memory Type: ROMless
• Ram Size: 56K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 2.7 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 208-LQFP
• Controller Family/series: (ARM7)
• No. Of I/o's: 27
• Ram Memory Size: 48KB
• Cpu Speed: 74MHz
• No. Of Timers: 2
• No. Of Pwm Channels: 2
• Digital Ic Case Style: LQFP
• Embedded Interface Type: SSI, UART
• Rohs Compliant: Yes
• Processor Series: EP73xx
• Core: ARM720T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB7312
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1209 - KIT DEVELOPMENT EP73XX ARM7
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1134

EP7312
High-Performance, Low-Power System on Chip
34
Pin
No.
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
A[27]/DRA[0]
A[26]/DRA[1]
A[25]/DRA[2]
A[24]/DRA[3]
A[23]/DRA[4]
A[22]/DRA[5]
A[21]/DRA[6]
A[20]/DRA[7]
HALFWORD
SMPCLK
COL[7]
COL[6]
COL[5]
COL[4]
COL[3]
COL[2]
VDDIO
COL[1]
COL[0]
VDDIO
Signal
VSSIO
VSSIO
VSSIO
VSSIO
TCLK
FB[1]
FB[0]
D[31]
D[30]
D[29]
D[28]
D[27]
D[26]
D[25]
D[24]
D[23]
D[22]
D[21]
BUZ
Table 20. 208-Pin LQFP Numeric Pin Listing (Continued)
©
Copyright Cirrus Logic, Inc. 2005
Strength
1
1
1
1
1
1
1
1
1
1
1
1
1
2
1
2
1
2
1
1
1
1
1
1
1
1
1
1
1
1
(All Rights Reserved)
†
Reset
State
High
High
High
High
High
High
High
High
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
—
—
Pad Gnd
Pad Gnd
Pad Gnd
Pad Gnd
Pad Pwr
Pad Pwr
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
Halfword access select output
Keyboard scanner column
Keyboard scanner column
Keyboard scanner column
Keyboard scanner column
Keyboard scanner column
Keyboard scanner column
Keyboard scanner column
Keyboard scanner column
SSI1 ADC sample clock
Digital I/O power, 3.3 V
Digital I/O power, 3.3 V
System byte address /
System byte address /
System byte address /
System byte address /
System byte address /
System byte address /
System byte address /
System byte address /
PWM feedback input
PWM feedback input
Buzzer drive output
SDRAM address
SDRAM address
SDRAM address
SDRAM address
SDRAM address
SDRAM address
SDRAM address
SDRAM address
Description
JTAG clock
I/O ground
I/O ground
I/O ground
I/O ground
Data I/O
Data I/O
Data I/O
Data I/O
Data I/O
Data I/O
Data I/O
Data I/O
Data I/O
Data I/O
Data I/O
drive
drive
drive
drive
drive
drive
drive
drive
DS508F1