Z8F0113PJ005SG Zilog, Z8F0113PJ005SG Datasheet - Page 155
Z8F0113PJ005SG
Manufacturer Part Number
Z8F0113PJ005SG
Description
IC ENCORE MCU FLASH 1K 28DIP
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet
1.Z8F0223SB005SG.pdf
(247 pages)
Specifications of Z8F0113PJ005SG
Core Processor
Z8
Core Size
8-Bit
Speed
5MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
1KB (1K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Other names
269-3995
Z8F0113PJ005SG
Z8F0113PJ005SG
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Table 88. Flash Options Bits at Program Memory Address 0001H
BITS
FIELD
RESET
R/W
ADDR
Note: U = Unchanged by Reset. R/W = Read/Write.
PS024314-0308
Flash Program Memory Address 0001H
R/W
U
7
Watchdog Timer can only be disabled by a Reset or Stop Mode Recovery. This setting is
the default for unprogrammed (erased) Flash.
Reserved—R/W bits must be 1 during writes; 1 when read.
VBO_AO—Voltage Brownout Protection Always ON
0 = Voltage Brownout Protection can be disabled in STOP mode to reduce total power
consumption. For the block to be disabled, the power control register bit must also be writ-
ten (see
1 = Voltage Brownout Protection is always enabled including during STOP mode. This
setting is the default for unprogrammed (erased) Flash.
FRP—Flash Read Protect
0 = User program code is inaccessible. Limited control features are available through the
On-Chip Debugger.
1 = User program code is accessible. All On-Chip Debugger commands are enabled. This
setting is the default for unprogrammed (erased) Flash.
Reserved—Must be 1
FWP—Flash Write Protect
This Option Bit provides Flash Program Memory protection:
0 = Programming and erasure disabled for all of Flash Program Memory. Programming,
Page Erase, and Mass Erase through User Code is disabled. Mass Erase is available using
the On-Chip Debugger.
1 = Programming, Page Erase, and Mass Erase are enabled for all of Flash program
memory.
Reserved—R/W must be 1 during writes; 1 when read
XTLDIS—State of Crystal Oscillator at Reset
Reserved
Power Control Register 0
R/W
U
6
R/W
U
5
Program Memory 0001H
XTLDIS
R/W
on page 32).
U
4
R/W
U
3
Z8 Encore! XP
R/W
U
2
Reserved
Product Specification
R/W
U
1
®
Flash Option Bits
F0823 Series
R/W
U
0
145
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