ST7FLITE29F2M6TR STMicroelectronics, ST7FLITE29F2M6TR Datasheet - Page 56

• Manufacturer Part Number: ST7FLITE29F2M6TR
• Description: IC MCU 8BIT 8K FLASH 20-SOIC
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FLITE29F2M6TR

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (7.5mm Width)
• Processor Series: ST7FLITE2x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7FLIT2-COS/COM, ST7FLITE-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 7 Channel / 13 bit, 7 Channel
• For Use With: 497-5858 - EVAL BOARD PLAYBACK ST7FLITE497-5049 - KIT STARTER RAISONANCE ST7FLITE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ST7LITE2
12-BIT AUTORELOAD TIMER (Cont’d)
11.2.3 Functional Description
PWM Mode
This mode allows up to four Pulse Width Modulat-
ed signals to be generated on the PWMx output
pins. The PWMx output signals can be enabled or
disabled using the OEx bits in the PWMCR regis-
ter.
PWM Frequency and Duty Cycle
The four PWM signals have the same frequency
(f
and the ATR register value.
Following the above formula,
– If f
– If f
Note: The maximum value of ATR is 4094 be-
cause it must be lower than the DCR value which
must be 4095 in this case.
At reset, the counter starts counting from 0.
When a upcounter overflow occurs (OVF event),
the preloaded Duty cycle values are transferred to
the Duty Cycle registers and the PWMx signals
are set to a high level. When the upcounter match-
es the DCRx value the PWMx signals are set to a
low level. To obtain a signal on a PWMx pin, the
Figure 36. PWM Function
56/133
1
PWM
f
minimum value is 8 KHz (ATR register value = 0)
is 2 MHz (ATR register value = 4094),the mini-
mum value is 1 KHz (ATR register value = 0).
PWM
COUNTER
COUNTER
) which is controlled by the counter period
AUTO-RELOAD
DUTY CYCLE
is 8 MHz (ATR register value = 4092), the
WITH OE=1
AND OPx=0
WITH OE=1
AND OPx=1
REGISTER
REGISTER
f
(DCRx)
PWM
(ATR)
is 4 Mhz
is 32 MHz, the maximum value of
= f
4095
000
COUNTER
,
the maximum value of f
/ (4096 - ATR)
PWM
contents of the corresponding DCRx register must
be greater than the contents of the ATR register.
The polarity bits can be used to invert any of the
four output signals. The inversion is synchronized
with the counter overflow if the TRAN bit in the
TRANCR register is set (reset value). See
35.
Figure 35. PWM Inversion Diagram
The maximum available resolution for the PWMx
duty cycle is:
Note: To get the maximum resolution (1/4096), the
ATR register must be 0. With this maximum reso-
lution, 0% and 100% can be obtained by changing
the polarity.
TRANCR Register
PWMxCSR Register
PWMx
TRAN
OPx
Resolution = 1 / (4096 - ATR)
overflow
counter
DFF
inverter
PWMx
PIN
Figure
t