Z86E3116VSG Zilog, Z86E3116VSG Datasheet - Page 27

IC MICROCONTROLLER 2K 28-PLCC

Z86E3116VSG

Manufacturer Part Number
Z86E3116VSG
Description
IC MICROCONTROLLER 2K 28-PLCC
Manufacturer
Zilog
Series
Z8®r
Datasheet

Specifications of Z86E3116VSG

Core Processor
Z8
Core Size
8-Bit
Speed
16MHz
Peripherals
POR, WDT
Number Of I /o
24
Program Memory Size
2KB (2K x 8)
Program Memory Type
OTP
Ram Size
125 x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-PLCC
Processor Series
Z86E3xx
Core
Z8
Data Bus Width
8 bit
Data Ram Size
125 B
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
24
Number Of Timers
2
Operating Supply Voltage
3.5 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z86E3116VSG
Manufacturer:
Zilog
Quantity:
10 000
Zilog
Port 2 (P27–P20). Port 2 is an 8-bit, bidirectional, CMOS-
compatible I/O port. These eight I/O lines can be config-
ured under software control as an input or output, indepen-
dently. All input buffers are Schmitt-triggered. Bits pro-
grammed as outputs can be globally programmed as
either push-pull or open-drain. Low EMI output buffers can
DS97Z8X0502
Open-Drain
OEN
Out
In
TTL Level Shifter
Z86E40
MCU
Figure 20. Port 2 Configuration
P R E L I M I N A R Y
R
500 K
be globally programmed by the software. When used as an
I/O port, Port 2 can be placed under handshake control.
In Handshake Mode, Port 3 lines P31 and P36 are used as
handshake control lines. The handshake direction is deter-
mined by the configuration (input or output) assigned to bit
7 of Port 2 (Figure 20).
Port 2 (I/O)
Handshake Controls
DAV2 and RDY2
(P31 and P36)
Auto Latch
Z8 4K OTP Microcontroller
PAD
Z86E30/E31/E40
27
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