C8051F334-GMR Silicon Laboratories Inc, C8051F334-GMR Datasheet - Page 105

• Manufacturer Part Number: C8051F334-GMR
• Description: IC 8051 MCU 2K FLASH 20MLP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F33xr

Specifications of C8051F334-GMR

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 17
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-QFN
• For Use With: 336-1451 - ADAPTER PROGRAM TOOLSTICK F330
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

C8051F330/1/2/3/4/5
11.4.3. System Clock
Additional Flash recommendations and example code can be found in AN201, "Writing to Flash from Firm-
ware", available from the Silicon Laboratories web site.
108
Bits7–2: UNUSED: Read = 000000b, Write = don’t care.
Bit1:
Bit0:
Bit7
—
R
10. Make certain that the Flash write and erase pointer variables are not located in XRAM. See
11. Add address bounds checking to the routines that write or erase Flash memory to ensure that
12. If operating from an external crystal, be advised that crystal performance is susceptible to
13. If operating from the external oscillator, switch to the internal oscillator during Flash write or
viced in priority order after the Flash operation has been completed and interrupts have been
re-enabled by software.
your compiler documentation for instructions regarding how to explicitly locate variables in dif-
ferent memory areas.
a routine called with an illegal address does not result in modification of the Flash.
electrical interference and is sensitive to layout and to changes in temperature. If the system
is operating in an electrically noisy environment, use the internal oscillator or use an external
CMOS clock.
erase operations. The external oscillator can continue to run, and the CPU can switch back to
the external oscillator after the Flash operation has completed.
PSEE: Program Store Erase Enable
Setting this bit (in combination with PSWE) allows an entire page of Flash program memory
to be erased. If this bit is logic 1 and Flash writes are enabled (PSWE is logic 1), a write to
Flash memory using the MOVX instruction will erase the entire page that contains the loca-
tion addressed by the MOVX instruction. The value of the data byte written does not matter.
0: Flash program memory erasure disabled.
1: Flash program memory erasure enabled.
PSWE: Program Store Write Enable
Setting this bit allows writing a byte of data to the Flash program memory using the MOVX
write instruction. The Flash location should be erased before writing data.
0: Writes to Flash program memory disabled.
1: Writes to Flash program memory enabled; the MOVX write instruction targets Flash
memory.
SFR Definition 11.1. PSCTL: Program Store R/W Control
Bit6
—
R
Bit5
—
R
Bit4
—
R
Rev. 1.7
Bit3
—
R
Bit2
—
R
PSEE
R/W
Bit1
SFR Address:
PSWE
R/W
Bit0
0x8F
00000000
Reset Value