C8051F510-IM Silicon Laboratories Inc, C8051F510-IM Datasheet - Page 198

• Manufacturer Part Number: C8051F510-IM
• Description: IC 8051 MCU 32K FLASH 40-QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F51xr

Specifications of C8051F510-IM

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 40-QFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, SMBus (2-Wire/I²C), CAN, LIN, SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 33
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.25 V
• Data Converters: A/D 32x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: C8051F5x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 4352 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 5.25 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F500DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 32 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1585 - PLATFORM PROG TOOLSTICK F588
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1562-5

C8051F50x/F51x
SFR Definition 20.25. P3MDIN: Port 3 Input Mode
SFR Address = 0xF4; SFR Page = 0x0F
SFR Definition 20.26. P3MDOUT: Port 3 Output Mode
SFR Address = 0xAE; SFR Page = 0x0F
198
Note: Port P3.1–P3.7 are only available on the 48-pin and 40-pin packages.
Note: Port P3.1–P3.7 are only available on the and 40-pin 48-pin packages.
Name
Reset
Name
Reset
7:0
7:0 P3MDOUT[7:0] Output Configuration Bits for P3.7–P3.0 (respectively).
Bit
Bit
Type
Type
Bit
Bit
P3MDIN[7:0]
Name
Name
7
1
7
0
Analog Configuration Bits for P3.7–P3.0 (respectively).
Port pins configured for analog mode have their weak pull-up and digital receiver
disabled. For analog mode, the pin also needs to be configured for open-drain
mode in the P3MDOUT register.
0: Corresponding P3.n pin is configured for analog mode.
1: Corresponding P3.n pin is not configured for analog mode.
These bits are ignored if the corresponding bit in register P3MDIN is logic 0.
0: Corresponding P3.n Output is open-drain.
1: Corresponding P3.n Output is push-pull.
6
1
6
0
5
1
5
0
Rev. 1.2
P3MDOUT[7:0]
4
1
4
0
P3MDIN[7:0]
R/W
R/W
Function
Function
3
1
3
0
2
1
2
0
1
1
1
0
0
1
0
0