C8051F504-IQ Silicon Laboratories Inc, C8051F504-IQ Datasheet - Page 12

• Manufacturer Part Number: C8051F504-IQ
• Description: IC 8051 MCU 32K FLASH 48-QFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F50xr

Specifications of C8051F504-IQ

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 48-QFP
• Mfg Application Notes: LIN Bootloader AppNote
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, SMBus (2-Wire/I²C), CAN, LIN, SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 40
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.25 V
• Data Converters: A/D 32x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: C8051F5x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 4.25 KB
• Interface Type: I2C/SPI/UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 40
• Number Of Timers: 4
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F500DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 32-ch x 12-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1527 - KIT DEV FOR C8051F50X
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1518

C8051F50x/F51x
12
Table 21.3. Autobaud Parameters Examples ........................................................ 205
Table 21.4. LIN Registers (Indirectly Addressable) ............................................... 210
Table 22.1. Background System Information ........................................................ 220
Table 22.2. Standard CAN Registers and Reset Values ....................................... 223
Table 23.1. SMBus Clock Source Selection .......................................................... 230
Table 23.2. Minimum SDA Setup and Hold Times ................................................ 231
Table 23.3. Sources for Hardware Changes to SMB0CN ..................................... 235
Table 23.4. SMBus Status Decoding ..................................................................... 241
Table 24.1. Baud Rate Generator Settings for Standard Baud Rates ................... 244
Table 25.1. SPI Slave Timing Parameters ............................................................ 264
Table 27.1. PCA Timebase Input Options ............................................................. 288
Table 27.2. PCA0CPM and PCA0PWM Bit Settings for 
Table 27.3. Watchdog Timer Timeout Intervals1 ................................................... 299
PCA Capture/Compare Modules ........................................................ 290
Rev. 1.2