MC9S12XET256CAG Freescale Semiconductor, MC9S12XET256CAG Datasheet - Page 955

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MC9S12XET256CAG

Manufacturer Part Number
MC9S12XET256CAG
Description
MCU 16BIT 256K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XET256CAG

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
S12XE
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 26
384 KByte Flash Module (S12XFTM384K2V1)
26.1
The FTM384K2 module implements the following:
Freescale Semiconductor
Revision
Number
V01.10
V01.11
V01.12
384 Kbytes of P-Flash (Program Flash) memory, consisting of 2 physical Flash blocks, intended
primarily for nonvolatile code storage
32 Kbytes of D-Flash (Data Flash) memory, consisting of 1 physical Flash block, that can be used
as nonvolatile storage to support the built-in hardware scheme for emulated EEPROM, as basic
Flash memory primarily intended for nonvolatile data storage, or as a combination of both
Introduction
29 Nov 2007
19 Dec 2007
25 Sep 2009
Revision
Date
26.3.2.1/26-967
26.4.2.4/26-994
26.4.2.7/26-997
26.3.2.1/26-967
26.4.1.2/26-986
26.4.2/26-991
26.4.2/26-991
26.3.1/26-960
26.3.2/26-965
26.4.2.12/26-
26.4.2.12/26-
26.4.2.12/26-
26.4.2.20/26-
26.6/26-1016
26.1/26-955
Sections
Affected
1001
1001
1001
1010
MC9S12XE-Family Reference Manual , Rev. 1.23
Table 26-1. Revision History
- Cleanup
- Updated Command Error Handling tables based on parent-child relationship
with FTM512K3
- Corrected Error Handling table for Full Partition D-Flash, Partition D-Flash,
and EEPROM Emulation Query commands
- Corrected P-Flash IFR Accessibility table
- Clarify single bit fault correction for P-Flash phrase
- Expand FDIV vs OSCCLK Frequency table
- Add statement concerning code runaway when executing Read Once
command from Flash block containing associated fields
- Add statement concerning code runaway when executing Program Once
command from Flash block containing associated fields
- Add statement concerning code runaway when executing Verify Backdoor
Access Key command from Flash block containing associated fields
- Relate Key 0 to associated Backdoor Comparison Key address
- Change “power down reset” to “reset”
- Add ACCERR condition for Disable EEPROM Emulation command
The following changes were made to clarify module behavior related to Flash
register access during reset sequence and while Flash commands are active:
- Add caution concerning register writes while command is active
- Writes to FCLKDIV are allowed during reset sequence while CCIF is clear
- Add caution concerning register writes while command is active
- Writes to FCCOBIX, FCCOBHI, FCCOBLO registers are ignored during
reset sequence
Description of Changes
955

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