C8051F343-GQ Silicon Laboratories Inc, C8051F343-GQ Datasheet - Page 145

• Manufacturer Part Number: C8051F343-GQ
• Description: IC 8051 MCU FLASH 32K 32LQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F34xr

Specifications of C8051F343-GQ

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 32-LQFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 25
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 21x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 2304 B
• Interface Type: I2C, SMBus, SPI, UART, USB
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 5.25 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: KSK-SL-F34X, KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F340DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 17 Channel
• Package: 32LQFP
• Device Core: 8051
• Family Name: C8051F34x
• Maximum Speed: 48 MHz
• Data Rom Size: 128 B
• A/d Bit Size: 10 bit
• A/d Channels Available: 17
• Height: 1.4 mm
• Length: 7 mm
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Width: 7 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1748 - ADAPTER TOOLSTICK FOR C8051F34X770-1006 - ISP 4PORT FOR SILABS C8051F MCU
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1301

SF Signals
(32-pin
Package)
SF Signals
(48-pin
Package)
PIN I/O
TX0
RX0
SCK
MISO
MOSI
NSS*
SDA
SCL
CP0
CP0A
CP1
CP1A
SYSCLK
CEX0
CEX1
CEX2
CEX3
CEX4
ECI
T0
T1
TX1**
RX1**
SF Signals
Port pin assigned to peripheral by the Crossbar
Special Function Signals are not assigned by the Crossbar. When these signals are
0
0
Figure 15.4. Crossbar Priority Decoder in Example Configuration
1
0
2
0
P0SKIP[0:7]
3
0
P0
4
0
*NSS is only pinned out in 4-wire SPI mode
5
0
6
0
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
7
0
0
0
1
0
2
0
P1SKIP[0:7]
(No Pins Skipped)
3
0
P1
4
0
Rev. 1.3
5
0
6
0
7
0
0
0
**UART1 available only on C8051F340/1/4/5/8/A/B devices
1
0
2
0
P2SKIP[0:7]
3
0
P2
4
0
5
0
6
0
7
0
Example:
0
0
1
0
P3.1-P3.7 unavailable on
the 32-pin packages
2
0
P3SKIP[0:7]
XBR0 = 0x07
XBR1 = 0x43
3
0
P3
4
0
5
0
6
0
7
0
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