M30281F6HP#U5B Renesas Electronics America, M30281F6HP#U5B Datasheet - Page 326

IC M16C/28 MCU FLASH 48K 64LQFP

M30281F6HP#U5B

Manufacturer Part Number
M30281F6HP#U5B
Description
IC M16C/28 MCU FLASH 48K 64LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/28r
Datasheet

Specifications of M30281F6HP#U5B

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
55
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
64-LQFP
For Use With
R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M
R
R
18.4 CPU Rewrite Mode
1
e
E
Table 18.3 EW Mode 0 and EW Mode 1
NOTES:
. v
6
J
Operation mode
Areas in which a
rewrite control
program can be located
Areas where
rewrite control
program can be
executed
Areas which can be
rewritten
Software command
Restrictions
Mode after programming Read Status Register Mode
or erasing
CPU state during auto-
write and auto-erase
Flash memory status
detection
Condition for transferring
In CPU rewrite mode, the user ROM area can be rewritten when the CPU executes software commands.
The user ROM area can be rewritten with microcomputer mounted on a board without using the ROM
writer. The program and block erase commands are executed only in the user ROM area.
When the interrupt requests are generated during the erase operation in CPU rewirte mode, the flash
memory offers an erase suspend function to suspend the erase operation and process the interrupt opera-
tion. During the erase suspend function is operated, the user ROM area can be read by program.
Erase-write(EW) 0 mode and erase-write 1 mode are provided as CPU rewrite mode. Table 18.3 lists
differences between EW mode 0 and EW mode 1. One wait is required for the CPU erase-write control.
to erase-suspend
0
C
2
9
2 /
0 .
B
1. Do not generate a DMA transfer.
2. Block 1 and Block 0 are enabled for rewrite by setting FMR02 bit in the FMR0 register to "1" and
3. The time, until entering erase suspend and reading flash is enabled, is maximum
8
0
0
0
G
4
setting FMR16 bit in the FMR1 register to "1". Block 2 to Block 5 are enabled for rewrite by setting
FMR16 bit in the FMR1 register to "1".
satisfying the conditions
J
7
a
o r
Item
0 -
. n
(2)
u
2
p
3
0
, 1
0
(
M
2
0
1
(3)
0
6
7
C
2 /
page 304
, 8
M
1
Single chip mode
User ROM area
The rewrite control program must be The rewrite control program can be
transferred to any other than the flash excuted in the user ROM area
memory (e.g., RAM) before being
executed
User ROM area
None
Operating
• Read the FMR00, FMR06, and
• Execute the read status register
Set the FMR40 and FMR41 bits in
the FMR4 register to "1" by program. set to "1" and the interruput request of
FMR07 bits in the FMR0 register
by program
command to read the SR7, SR5,
and SR4 bits.
6
C
2 /
f o
8
3
) B
8
5
EW mode 0
Single chip mode
User ROM area
User ROM area
• Program, block erase command
• Read Status Register command
Read Array mode
In a hold state (I/O ports retain the state
before the command is excuted
Read the FMR00, FMR06, and FMR07
bits in the FMR0 registerby program
The FMR40 bit in the FMR4 register is
an acknowledged interrupt is generated
However, this excludes blocks with the
rewrite control program
Cannot be executed in a block having
the rewite control program
Cannot be executed
EW mode 1
18. Flash Memory Version
td(SR-ES)
(1)
after

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