M30281F6HP#U3B Renesas Electronics America, M30281F6HP#U3B Datasheet - Page 148

• Manufacturer Part Number: M30281F6HP#U3B
• Description: IC M16C/28 MCU FLASH 48K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/28r

Specifications of M30281F6HP#U3B

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 55
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• For Use With: R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M
R
R
e
E
1
Figure 12.28 IDB0 Register, IDB1Register, DTT Register, and ICTB2 Register
. v
J
6
0
C
2
9
2 /
0 .
B
0
8
0
0
G
4
J
Timer B2 Interrupt Occurrences Frequency Set Counter
NOTES:
7
a
Three-phase Output Buffer Register(i=0,1)
o r
Dead Time Timer
b7 b6 b5
0 0
0
b7
b7
0 -
. n
NOTES:
NOTES:
1. Use MOV instruction to write to this register.
u
2
1. Use MOV instruction to write to this register.
2. Effective when the INV15 bit is set to “0” (dead time timer enable). If the INV15 bit is set to “1”, the dead time timer is
3
1. The IDB0 and IDB1 register values are transferred to the three-phase shift register by a transfer trigger. The value
p
If the INV01 bit is set to "1", make sure the TB2S bit also is set to "0" (timer B2 count stopped) when writing to
this register. If the INV01 bit is set to "0", although this register can be written even when the TB2S bit is set to
"1" (timer B2 count start), do not write synchronously with a timer B2 underflow.
0
, 1
disabled and has no effect.
0
written to the IDB0 register aftera transfer trigger represents the output signal of each phase, and the next value
written to the IDB1 register at the falling edge of the timer A1, A2 or A4 one-shot pulse represents the output signal
of each phase.
(
M
2
0
1
b4
b4
0
6
7
b3
C
b3
2 /
b2
page 126
, 8
b1
M
b0
b0
1
b0
(1, 2)
6
Assuming the set value = n, upon a start trigger the timer starts
counting the count souce selected by the INV12 bit and stops
after counting it n times. The positive or negative phase
whichever is going from an inactive to an active level changes
at the same time the dead time timer stops.
Bit Symbol
C
If the INV01 bit is "0" (ICTB2 counter counted every
time timer B2 underflows), assuming the set value
= n, a timer B2 interrupt is generated at every níth
occurrence of a timer B2 underflow.
If the INV01 bit is "1" (ICTB2 counter count timing
selected by the INV00 bit), assuming the set value
= n, a timer B2 interrupt is generated at every níth
occurrence of a timer B2 underflow that meets the
condition selected by the INV00 bit.
Nothing is assigned. When write, set to "0". When read, its content is
indeterminate.
Nothing is assigned. When write, set to "0". When read, its content is
indeterminate.
(b7-b6)
2 /
DWBi
f o
DUBi
DVBi
DWi
DUi
DVi
Symbol
IDB0
IDB1
Symbol
DTT
8
3
) B
Symbol
ICTB2
8
5
U phase output buffer i
U phase output buffer i
V phase output buffer i
V phase output buffer i
W phase output buffer i
W phase output buffer i
Nothing is assigned. When write, set to "0". When read,
these contents are "0".
Bit Name
Function
Function
Address
034D
Address
034A
034B
Address
034C
16
16
16
16
(1)
Write the output level
0: Active level
1: Inactive level
When read, these bits show the three-phase
output shift register value.
(1)
After Reset
Indeterminate
After Reset
00111111
00111111
After Reset
Indeterminate
1 to 15
Setting Range
Function
2
2
1 to 255
Setting range
RO
WO
RW
RW
RW
RW
RW
RW
RW
RW
RO
WO
RW
12. Timer