M30281F6HP#U3B Renesas Electronics America, M30281F6HP#U3B Datasheet - Page 385

• Manufacturer Part Number: M30281F6HP#U3B
• Description: IC M16C/28 MCU FLASH 48K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/28r

Specifications of M30281F6HP#U3B

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 55
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• For Use With: R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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20.6.2 Timer B
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20.6.2.1 Timer B (Timer Mode)
20.6.2.2 Timer B (Event Counter Mode)
20.6.2.3 Timer B (Pulse Period/pulse Width Measurement Mode)
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1. The timer remains idle after reset. Set the mode, count source, counter value, etc. using the TBiMR
2. The counter value can be read out at any time by reading the TBi register. However, if this register
1. The timer remains idle after reset. Set the mode, count source, counter value, etc. using the TBiMR
2. The counter value can be read out at any time by reading the TBi register. However, if this register
1. The timer remains idle after reset. Set the mode, count source, etc. using the TBiMR (i = 0 to 2)
2. The IR bit in TBiIC register (i=0 to 2) goes to “1” (interrupt request), when an effective edge of a
3. If the source of interrupt cannot be identified by the MR3 bit such as when the measurement pulse
4. To set the MR3 bit to “0” (no overflow), set TBiMR register with setting the TBiS bit to “1” and
5. Use the IR bit in TBiIC register to detect only overflows. Use the MR3 bit only to determine the
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(i = 0 to 2) register and TBi register before setting the TBiS bit in the TABSR register to “1” (count
starts).
Always make sure the TBiMR register is modified while the TBiS bit remains “0” (count stops)
regardless whether after reset or not.
is read at the same time the counter is reloaded, the read value is always “FFFF
register is read after setting a value in it but before the counter starts counting, the read value is the
one that has been set in the register.
(i = 0 to 2) register and TBi register before setting the TBiS bit in the TABSR register to “1” (count
starts).
Always make sure the TBiMR register is modified while the TBiS bit remains “0” (count stops)
regardless whether after reset or not.
is read at the same time the counter is reloaded, the read value is always “FFFF
register is read after setting a value in it but before the counter starts counting, the read value is the
one that has been set in the register.
register before setting the TBiS bit in the TABSR register to “1” (count starts).
Always make sure the TBiMR register is modified while the TBiS bit remains “0” (count stops)
regardless whether after reset or not. To clear the MR3 bit to “0” by writing to the TBiMR register
while the TBiS bit is set to “1” (count starts), be sure to write the same value as previously written to
the TM0D0, TM0D1, MR0, MR1, TCK0 and TCK1 bits and a 0 to the MR2 bit.
measurement pulse is input or timer Bi is overflowed. The factor of interrupt request can be deter-
mined by use of the MR3 bit in TBiMR register within the interrupt routine.
input and a timer overflow occur at the same time, use another timer to count the number of times
timer B has overflowed.
counting the next count source after setting the MR3 bit to “1” (overflow).
interrupt factor within the interrupt routine.
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20. Precautions
.” If the TBi
.” If the TBi