MCF52233CAL60 Freescale Semiconductor, MCF52233CAL60 Datasheet - Page 10

• Manufacturer Part Number: MCF52233CAL60
• Description: IC MCU 256K FLASH 60MHZ 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF5223xr

Specifications of MCF52233CAL60

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 60MHz
• Connectivity: Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 73
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Cpu Family: MCF5223x
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 60MHz
• Interface Type: I2C/QSPI/UART
• Total Internal Ram Size: 32KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 10
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 8-chx12-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 112
• Package Type: LQFP
• Processor Series: MCF522x
• Core: ColdFire V2
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 10
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: M52235EVB, M52233DEMO
• Minimum Operating Temperature: - 40 C
• Package: 112LQFP
• Family Name: MCF5223x
• Maximum Speed: 60 MHz
• Operating Supply Voltage: 3.3 V
• For Use With: M52233DEMO - BOARD DEMO FOR MCF52233
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

MCF52235 Family Configurations
module is physically connected to the processor's high-speed local bus, it can quickly service core-initiated accesses or
memory-referencing commands from the debug module.
The SRAM module is also accessible by the DMA. The dual-ported nature of the SRAM makes it ideal for implementing
applications with double-buffer schemes, where the processor and a DMA device operate in alternate regions of the SRAM to
maximize system performance.
1.2.5.2
The ColdFire flash module (CFM) is a non-volatile memory (NVM) module that connects to the processor’s high-speed local
bus. The CFM is constructed with four banks of 32 K16-bit flash arrays to generate 256 Kbytes of 32-bit flash memory. These
arrays serve as electrically erasable and programmable, non-volatile program and data memory. The flash memory is ideal for
program and data storage for single-chip applications, allowing for field reprogramming without requiring an external high
voltage source. The CFM interfaces to the ColdFire core through an optimized read-only memory controller which supports
interleaved accesses from the 2-cycle flash arrays. A backdoor mapping of the flash memory is used for all program, erase, and
verify operations, as well as providing a read datapath for the DMA. Flash memory may also be programmed via the EzPort,
which is a serial flash programming interface that allows the flash to be read, erased and programmed by an external controller
in a format compatible with most SPI bus flash memory chips. This allows easy device programming via Automated Test
Equipment or bulk programming tools.
1.2.6
The MCF52235 device incorporates two hardware accelerators for cryptographic functions. First, the CAU is a coprocessor
tightly-coupled to the V2 ColdFire core that implements a set of specialized operations to increase the throughput of
software-based encryption and message digest functions, specifically the DES, 3DES, AES, MD5 and SHA-1 algorithms.
Second, a random number generator provides FIPS-140 compliant 32-bit values to security processing routines. Both modules
supply critical acceleration to software-based cryptographic algorithms at a minimal hardware cost.
1.2.7
The MCF52235 incorporates several low-power modes of operation which are entered under program control and exited by
several external trigger events. An integrated power-on reset (POR) circuit monitors the input supply and forces an MCU reset
as the supply voltage rises. The low voltage detector (LVD) monitors the supply voltage and is configurable to force a reset or
interrupt condition if it falls below the LVD trip point.
1.2.8
The FlexCAN module is a communication controller implementing version 2.0 of the CAN protocol parts A and B. The CAN
protocol can be used as an industrial control serial data bus, meeting the specific requirements of reliable operation in a harsh
EMI environment with high bandwidth. This instantiation of FlexCAN has 16 message buffers.
1.2.9
The MCF52235 has three full-duplex UARTs that function independently. The three UARTs can be clocked by the system bus
clock, eliminating the need for an external clock source. On smaller packages, the third UART is multiplexed with other digital
I/O functions.
10
Cryptography Acceleration Unit
Power Management
FlexCAN
UARTs
Flash
MCF52235 ColdFire Microcontroller Data Sheet, Rev. 10
Freescale Semiconductor