PIC16C84-10I/SO Microchip Technology, PIC16C84-10I/SO Datasheet - Page 40

MICRO CTL EEPM 1K 10MHZ IT18SOIC

PIC16C84-10I/SO

Manufacturer Part Number
PIC16C84-10I/SO
Description
MICRO CTL EEPM 1K 10MHZ IT18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheet

Specifications of PIC16C84-10I/SO

Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Peripherals
POR, WDT
Number Of I /o
13
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
EEPROM
Eeprom Size
64 x 8
Ram Size
36 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
18-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Data Converters
-
Connectivity
-
PIC16C84
8.4
A Power-on Reset pulse is generated on-chip when
V
take advantage of the POR, just tie the MCLR pin
directly (or through a resistor) to V
external RC components usually needed to create
Power-on Reset. A minimum rise time for V
met for this to operate properly. See Electrical Specifi-
cations for details.
When the device starts normal operation (exits the
reset condition), device operating parameters (voltage,
frequency, temperature, ...) must be meet to ensure
operation. If these conditions are not met, the device
must be held in reset until the operating conditions
are met.
For additional information, refer to Application Note
AN607, Power-up Trouble Shooting .
The POR circuit does not produce an internal reset
when V
8.5
The Power-up Timer (PWRT) provides a fixed 72 ms
nominal time-out (T
Figure 8-10, Figure 8-11 and Figure 8-12). The Power-
up Timer operates on an internal RC oscillator. The
chip is kept in reset as long as the PWRT is active. The
PWRT delay allows the V
level (Possible exception shown in Figure 8-12).
A configuration bit, PWRTE, can enable/disable the
PWRT (Figure 8-1).
The power-up time delay T
chip due to V
See DC parameters for details.
8.6
The Oscillator Start-up Timer (OST) provides a 1024
oscillator cycle delay (from OSC1 input) after the
PWRT delay ends (Figure 8-9, Figure 8-10, Figure 8-
11 and Figure 8-12). This ensures the crystal oscillator
or resonator has started and stabilized.
The OST time-out (T
HS modes and only on Power-on Reset or wake-up
from SLEEP.
When V
T
V
12), an external power-on reset circuit may be neces-
sary (Figure 8-8).
DS30445C-page 40
PWRT
DD
DD
has reached its final value. In this case (Figure 8-
rise is detected (in the range of 1.2V - 1.7V). To
DD
time-out and T
DD
Power-on Reset (POR)
Power-up Timer (PWRT)
Oscillator Start-up Timer (OST)
declines.
rises very slowly, it is possible that the
DD
, temperature, and process variation.
OST
PWRT
OST
) is invoked only for XT, LP and
DD
) from POR (Figure 8-9,
PWRT
time-out will expire before
to rise to an acceptable
will vary from chip to
DD
. This will eliminate
DD
must be
FIGURE 8-8:
Note 1: External Power-on Reset circuit is required
2: R < 40 k is recommended to make sure
3: R1 = 100 to 1 k will limit any current
V
DD
only if V
diode D helps discharge the capacitor
quickly when V
that voltage drop across R does not exceed
0.2V (max leakage current spec on MCLR
pin is 5 A). A larger voltage drop will
degrade V
flowing into MCLR from external
capacitor C in the event of an MCLR pin
breakdown due to ESD or EOS.
D
V
DD
EXTERNAL POWER-ON
RESET CIRCUIT (FOR SLOW
V
R
DD
DD
C
IH
power-up rate is too slow. The
POWER-UP)
level on the MCLR pin.
1997 Microchip Technology Inc.
DD
R1
powers down.
MCLR
PIC16CXX

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