EP9301-CQ Cirrus Logic Inc, EP9301-CQ Datasheet
EP9301-CQ
Specifications of EP9301-CQ
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EP9301-CQ Summary of contents
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... Errata: EP9301 - Silicon Revision: E2 Reference EP9301 Data Sheet revision DS636PP5 dated March 2005. Determining the Silicon Revision of the Integrated Circuit On the front of the integrated circuit, directly under the part number alpha-numeric line. Characters 5 and 6 in this line represent the silicon revision of the chip. For example, this line indicates that the chip is a “ ...
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Ethernet Description 1 The Ethernet controller does not correctly receive frames that have a size of 64 bytes. Workaround In order to receive frames of 64 bytes, enable the RCRCA bit in RxCTL. This will prevent the Ethernet controller from ...
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Temporarily disable the UART DMA RX interface by clearing the RXDMAE bit in the UART1DMACtrl reg- ister. 3) Wait until the difference between the CURRENTx and BASEx registers in the DMA channel is equal ...
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USB Description 1 USB clock divider logic operates at a maximum rate of 288 MHz under worst case conditions. Workaround When using USB, make sure the clock frequency supplied to the USB clock divider does not exceed 288 MHz. The ...
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Revision History Errata Board Document Date Revision Revision E2 Initial Errata March 2005 E2 A April 2007 E2 A April 2007 E2 B April 2007 ER636E2B Revision History Functionality Summary of Errata Affected Processor may boot into an invalid state. ...