MC9S08GB60CFU Freescale Semiconductor, MC9S08GB60CFU Datasheet - Page 162

no-image

MC9S08GB60CFU

Manufacturer Part Number
MC9S08GB60CFU
Description
IC MCU 60K FLASH 20MHZ 64-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08GB60CFU

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
56
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
For Use With
M68DEMO908GB60E - BOARD DEMO MC9S08GB60M68EVB908GB60E - BOARD EVAL FOR MC9S08GB60
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S08GB60CFU
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC9S08GB60CFU
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
Part Number:
MC9S08GB60CFUE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC9S08GB60CFUE
Manufacturer:
FREESCALE
Quantity:
1 000
Part Number:
MC9S08GB60CFUE
Manufacturer:
FREESCALE
Quantity:
20 000
Part Number:
MC9S08GB60CFUER
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Timer/PWM (TPM) Module
PS2:PS1:PS0 — Prescale Divisor Select
10.7.2
The two read-only TPM counter registers contain the high and low bytes of the value in the TPM counter.
Reading either byte (TPMxCNTH or TPMxCNTL) latches the contents of both bytes into a buffer where
they remain latched until the other byte is read. This allows coherent 16-bit reads in either order. The
coherency mechanism is automatically restarted by an MCU reset, a write of any value to TPMxCNTH or
TPMxCNTL, or any write to the timer status/control register (TPMxSC).
Reset clears the TPM counter registers.
162
This 3-bit field selects one of eight divisors for the TPM clock input as shown in
prescaler is located after any clock source synchronization or clock source selection, so it affects
whatever clock source is selected to drive the TPM system.
Timer x Counter Registers (TPMxCNTH:TPMxCNTL)
Reset:
Reset:
Read:
Write:
Read:
Write:
PS2:PS1:PS0
Figure 10-6. Timer x Counter Register High (TPMxCNTH)
Figure 10-7. Timer x Counter Register Low (TPMxCNTL)
0:0:0
0:0:1
0:1:0
0:1:1
1:0:0
1:0:1
1:1:0
1:1:1
Bit 15
Bit 7
Bit 7
Bit 7
0
0
Table 10-2. Prescale Divisor Selection
MC9S08GB/GT Data Sheet, Rev. 2.3
14
6
0
6
6
0
Any write to TPMxCNTH clears the 16-bit counter.
Any write to TPMxCNTL clears the 16-bit counter.
13
5
0
5
5
0
TPM Clock Source Divided-By
12
4
0
4
4
0
128
11
16
32
64
3
0
3
3
0
1
2
4
8
10
2
0
2
2
0
Freescale Semiconductor
1
9
0
1
1
0
Table
10-2. This
Bit 0
Bit 8
Bit 0
Bit 0
0
0

Related parts for MC9S08GB60CFU