MCP607-I/SN Microchip Technology, MCP607-I/SN Datasheet - Page 16

• Manufacturer Part Number: MCP607-I/SN
• Description: IC OPAMP 2.5V DUAL R-R 8SOIC
• Manufacturer: Microchip Technology

Specifications of MCP607-I/SN

• Slew Rate: 0.08 V/µs
• Package / Case: 8-SOIC (3.9mm Width)
• Amplifier Type: General Purpose
• Number Of Circuits: 2
• Output Type: Rail-to-Rail
• Gain Bandwidth Product: 155kHz
• Current - Input Bias: 1pA
• Voltage - Input Offset: 250µV
• Current - Supply: 18.7µA
• Current - Output / Channel: 17mA
• Voltage - Supply, Single/dual (±): 2.5 V ~ 6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Number Of Channels: 2
• Common Mode Rejection Ratio (min): 75 dB
• Input Offset Voltage: 0.25 mV
• Input Bias Current (max): 1 pA
• Operating Supply Voltage: 3 V, 5 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Shutdown: No
• Supply Voltage (max): 6 V
• Supply Voltage (min): 2.5 V
• Technology: CMOS
• Voltage Gain Db: 121 dB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• -3db Bandwidth: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MCP606/7/8/9
4.2
There are two specifications that describe the
output-swing capability of the MCP606/7/8/9 family of
op amps. The first specification (Maximum Output
Voltage Swing) defines the absolute maximum swing
that can be achieved under the specified load
conditions. For instance, the output voltage swings to
within 15 mV of the negative rail with a 25 kΩ load to
V
limited when the input goes beyond the linear region of
operation.
The second specification that describes the output-
swing capability of these amplifiers (Linear Output
Voltage Range) defines the maximum output swing that
can be achieved while the amplifier still operates in its
linear region. To verify linear operation in this range, the
large-signal DC Open-Loop Gain (A
points inside the supply rails. The measurement must
meet the specified A
table.
4.3
Driving large capacitive loads can cause stability
problems for voltage-feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases and the closed-loop bandwidth is
reduced. This produces gain-peaking in the frequency
response, with overshoot and ringing in the step
response. A unity-gain buffer (G = +1) is the most
sensitive to capacitive loads, though all gains show the
same general behavior.
When driving large capacitive loads with these op
amps (e.g., > 60 pF when G = +1), a small series
resistor at the output (R
feedback loop’s phase margin (stability) by making the
output load resistive at higher frequencies. The
bandwidth will be generally lower than the bandwidth
with no capacitive load.
FIGURE 4-4:
stabilizes large capacitive loads.
Figure 4-5
different capacitive loads and gains. The x-axis is the
normalized load capacitance (C
circuit’s noise gain. For non-inverting gains, G
Signal Gain are equal. For inverting gains, G
1+|Signal Gain| (e.g., -1 V/V gives G
DS11177F-page 16
DD
/2.
V
IN
Figure 2-23
Rail-to-Rail Output
Capacitive Loads
gives recommended R
MCP60X
shows how the output voltage is
OL
Output Resistor, R
ISO
conditions in the specification
in
Figure
R
C
ISO
L
L
/G
N
OL
), where G
N
4-4) improves the
ISO
) is measured at
= +2 V/V).
values for
V
ISO
OUT
N
N
and the
is the
N
is
FIGURE 4-5:
for Capacitive Loads.
After selecting R
resulting frequency response peaking and step
response overshoot. Modify R
response is reasonable. Bench evaluation and simula-
tions with the MCP606/7/8/9 SPICE macro model are
helpful.
4.4
The MCP608 is a single op amp with Chip Select (CS).
When CS is pulled high, the supply current drops to
50 nA (typical) and flows through the CS pin to V
When this happens, the amplifier output is put into a
high-impedance state. By pulling CS low, the amplifier
is enabled. The CS pin has an internal 5 MΩ (typical)
pull-down resistor connected to V
the CS pins is left floating.
voltage and supply current response to a CS pulse.
4.5
With this family of operational amplifiers, the power
supply pin (V
bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm
for good high-frequency performance. It also needs a
bulk capacitor (i.e., 1 µF or larger) within 100 mm to
provide large, slow currents. This bulk capacitor can be
shared with other nearby analog parts.
10k
100
1k
10p
10000
1000
100
10
MCP608 Chip Select
Supply Bypass
Normalized Load Capacitance; C
DD
for single-supply) should have a local
ISO
100p
for your circuit, double-check the
100
Recommended R
© 2009 Microchip Technology Inc.
Figure 1-1
G
G
G
N
N
N
= +1
= +2
≥ +4
ISO
SS
1n
’s value until the
, so it will go low if
1000
shows the output
L
/G
ISO
N
(F)
Values
10n
10000
SS
.