AD8036AR Analog Devices Inc, AD8036AR Datasheet - Page 19

• Manufacturer Part Number: AD8036AR
• Description: IC OPAMP VF ULDIST LN 70MA 8SOIC
• Manufacturer: Analog Devices Inc
• Series: CLAMPIN™r

Specifications of AD8036AR

• Slew Rate: 1200 V/µs
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Rohs Status: RoHS non-compliant
• Amplifier Type: Voltage Feedback
• Number Of Circuits: 1
• -3db Bandwidth: 240MHz
• Current - Input Bias: 4µA
• Voltage - Input Offset: 2000µV
• Current - Supply: 20.5mA
• Current - Output / Channel: 70mA
• Voltage - Supply, Single/dual (±): ±3 V ~ 6 V
• Operating Temperature: -40°C ~ 85°C
• No. Of Amplifiers: 1
• Bandwidth: 240MHz
• No. Of Pins: 8
• Peak Reflow Compatible (260 C): No
• Leaded Process Compatible: No
• For Use With: AD8036-EB - BOARD EVAL FOR AD8036
• Output Type: -
• Gain Bandwidth Product: -
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

The circuit uses an AD8037 operating at a gain of two with an
AD811 to boost the output to the ± 12 V range. The AD811 was
chosen for its ability to operate with ± 15 V supplies and its high
slew rate.
R1 and R2 act as a level shifter to make the TTL signal levels be
approximately symmetrical above and below ground. This ensures
that both the high and low logic levels will be clamped by the
AD8037. For well controlled signal levels in the output pulse,
the high and low output levels should result from the clamping
action of the AD8037 and not be controlled by either the high
or low logic levels passing through a linear amplifier. For good
rise and fall times at the output pulse, a logic family with high
speed edges should be used.
The high logic levels are clamped at two times the voltage at V
while the low logic levels are clamped at two times the voltage
at V
operating at a gain of 5. The overall gain of 10 will cause the
high output level to be 10 times the voltage at V
output level to be 10 times the voltage at V
High Speed, Full-Wave Rectifier
The clamping inputs are additional inputs to the input stage of
the op amp. As such they have an input bandwidth comparable
to the amplifier inputs and lend themselves to some unique
functions when they are driven dynamically.
Figure 12 is a schematic for a full-wave rectifier, sometimes
called an absolute value generator. It works well up to 20 MHz
and can operate at significantly higher frequencies with some
degradation in performance. The distortion performance is sig-
nificantly better than diode based full-wave rectifiers, especially
at high frequencies.
V
L
IN
. The output of the AD8037 is amplified by the AD811
274
R
G
100
TTL
IN
274
R
AD8037
F
200
V
V
H
L
–15V
+5V
–5V
1.3k
100
0.1 F
0.1 F
274
0.1 F
0.1 F
AD8037
10 F
L
10 F
.
V
V
V
V
H
H
L
L
H
+5V
–5V
, and the low
V
OUT
0.1 F
0.1 F
274
= V
IN
10 F
H
10 F
,
The circuit is configured as an inverting amplifier with a gain
of one. The input drives the inverting amplifier and also directly
drives V
ing input, V
When the input is negative, the amplifier acts as a regular unity-
gain inverting amplifier and outputs a positive signal at the same
amplitude as the input with opposite polarity. V
tive by the input, so it performs no clamping action, because the
positive output signal is always higher than the negative level
driving V
When the input is positive, the output result is the sum of two
separate effects. First, the inverting amplifier multiplies the input
by –1 because of its unity-gain inverting configuration. This
effectively produces an offset as explained above, but with a
dynamic level that is equal to –1 times the input.
Second, although the positive input is grounded (through 100 Ω),
the output is clamped at two times the voltage applied to V
positive, dynamic voltage in this case). The factor of two is
because the noise gain of the amplifier is two.
The sum of these two actions results in an output that is equal
to unity times the input signal for positive input signals, see Fig-
ure 13. For a input/output scope photo with an input signal of
20 MHz and amplitude ± 1 V, see Figure 14.
100
150
LOWER
CLAMPING
LEVEL WITH
NO NEG INPUT
L
–1
AD811
, the lower level clamping input. The high level clamp-
L
.
–15V
H
INPUT
, is left floating and plays no role in this circuit.
+15V
0.1 F
604
0.1 F
10 F
10 F
OUTPUT
INPUT
AD8036/AD8037
PULSE
OUT
V
V
H
L
10
10
L
FULL WAVE
RECTIFIED
OUTPUT
LOWER
CLAMPING
LEVEL
is driven nega-
L
(a