AD8036AR Analog Devices Inc, AD8036AR Datasheet - Page 21

• Manufacturer Part Number: AD8036AR
• Description: IC OPAMP VF ULDIST LN 70MA 8SOIC
• Manufacturer: Analog Devices Inc
• Series: CLAMPIN™r

Specifications of AD8036AR

• Slew Rate: 1200 V/µs
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Rohs Status: RoHS non-compliant
• Amplifier Type: Voltage Feedback
• Number Of Circuits: 1
• -3db Bandwidth: 240MHz
• Current - Input Bias: 4µA
• Voltage - Input Offset: 2000µV
• Current - Supply: 20.5mA
• Current - Output / Channel: 70mA
• Voltage - Supply, Single/dual (±): ±3 V ~ 6 V
• Operating Temperature: -40°C ~ 85°C
• No. Of Amplifiers: 1
• Bandwidth: 240MHz
• No. Of Pins: 8
• Peak Reflow Compatible (260 C): No
• Leaded Process Compatible: No
• For Use With: AD8036-EB - BOARD EVAL FOR AD8036
• Output Type: -
• Gain Bandwidth Product: -
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Layout Considerations
The specified high speed performance of the AD8036 and
AD8037 requires careful attention to board layout and component
selection. Proper RF design techniques and low pass parasitic
component selection are mandatory.
The PCB should have a ground plane covering all unused
portions of the component side of the board to provide a low
impedance path. The ground plane should be removed from the
area near the input pins to reduce stray capacitance.
Chip capacitors should be used for supply and input clamp
bypassing (see Figure 17). One end should be connected to
the ground plane and the other within 1/8 inch of each power
and clamp pin. An additional large (0.47 µF–10 µF) tantalum
electrolytic capacitor should be connected in parallel, though
not necessarily so close, to supply current for fast, large signal
changes at the output.
The feedback resistor should be located close to the inverting
input pin in order to keep the stray capacitance at this node to a
minimum. Capacitance variations of less than 1 pF at the invert-
ing input will significantly affect high speed performance.
Stripline design techniques should be used for long signal traces
(greater than about 1 inch). These should be designed with a
characteristic impedance of 50 Ω or 75 Ω and be properly termi-
nated at each end.
Evaluation Board
An evaluation board for both the AD8036 and AD8037 is
available that has been carefully laid out and tested to demon-
strate that the specified high speed performance of the device
can be realized. For ordering information, please refer to the
Ordering Guide.
The layout of the evaluation board can be used as shown or
serve as a guide for a board layout.
Component
R
R
R
R
R
Small Signal BW (MHz)
F
G
O
S
T
(Nominal)
(Nominal)
+1
140 Ω
49.9 Ω
130 Ω
49.9 Ω
240
+2
274 Ω
274 Ω
49.9 Ω
100 Ω
49.9 Ω
90
AD8036A
Table I.
Gain
2 kΩ
221 Ω
49.9 Ω
100 Ω
49.9 Ω
+10
10
+100
2 kΩ
20.5 Ω
49.9 Ω
100 Ω
49.9 Ω
1.3
IN
OPTIONAL
R
G
+V
–V
R
S
S
T
NONINVERTING CONFIGURATION
R
S
+2
274 Ω
274 Ω
49.9 Ω
100 Ω
49.9 Ω
275
0.1 F
0.1 F
SUPPLY BYPASSING
AD8036/
AD8037
C1
0.01 F
C2
0.01 F
V
V
H
L
R
–V
+V
F
+10
2 kΩ
221 Ω
49.9 Ω
100 Ω
49.9 Ω
21
S
S
AD8036/AD8037
C3
0.1 F
C4
0.1 F
AD8037A
+V
–V
–V
+V
S
S
S
1k
S
1k
Gain
R
C5
10 F
C6
10 F
O
+100
2 kΩ
20.5 Ω
49.9 Ω
100 Ω
49.9 Ω
3
V
OUT