HFA1112IB Intersil, HFA1112IB Datasheet - Page 5

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HFA1112IB

Manufacturer Part Number
HFA1112IB
Description
IC BUFFER 850MHZ 8-SOIC
Manufacturer
Intersil
Datasheet

Specifications of HFA1112IB

Amplifier Type
Buffer
Number Of Circuits
1
Slew Rate
2400 V/µs
-3db Bandwidth
850MHz
Current - Input Bias
25µA
Voltage - Input Offset
8000µV
Current - Supply
21mA
Current - Output / Channel
60mA
Voltage - Supply, Single/dual (±)
9 V ~ 11 V, ±4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Output Type
-
Gain Bandwidth Product
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HFA1112IBZ
Manufacturer:
Intersil
Quantity:
1 558
Part Number:
HFA1112IBZ
Manufacturer:
INTERSIL
Quantity:
20 000
Part Number:
HFA1112IBZ96
Manufacturer:
INTERSIL
Quantity:
14 500
(as illustrated in the curves), the maximum bandwidth is
obtained without sacrificing stability. Even so, bandwidth
does decrease as you move to the right along the curve.
For example, at A
bandwidth is limited to 300MHz, and bandwidth drops to
100MHz at A
FIGURE 1. RECOMMENDED SERIES OUTPUT RESISTOR vs
10µF
50
45
40
35
30
25
20
15
10
IN
5
0
0
or 0Ω (A
A
∞ (A
V
0.1µF
= +2
40
V
R
LOAD CAPACITANCE
V
50Ω
1
= +1)
= +1, R
V
A
V
= +2)
80
V
= +1
= +1, R
-5V
120
LOAD CAPACITANCE (pF)
S
1
2
3
4
= 5Ω, C
160
S
= 50Ω, C
5
200
L
= 340pF.
GND
FIGURE 2. EVALUATION BOARD SCHEMATIC AND LAYOUT
240
8
7
6
5
L
= 30pF, the overall
50Ω
280 320
0.1µF
V
H
GND
OUT
V
360 400
L
10µF
+5V
HFA1112
+IN
Evaluation Board
The performance of the HFA1112 may be evaluated using
the HFA11XX Evaluation Board, slightly modified as follows:
The layout and modified schematic of the board are shown in
Figure 2.
To order evaluation boards (part number HFA11XXEVAL),
please contact your local sales office.
1. Remove the 500Ω feedback resistor (R
2. a. For A
TOP LAYOUT
connection open.
b. For A
resistor (R
a 0Ω resistor to GND.
1
V
H
V
V
V
= +2, replace the 500Ω gain setting resistor with
= +1 evaluation, remove the 500Ω gain setting
L
OUT
V-
1
GND
), and leave pin 2 floating.
V+
BOTTOM LAYOUT
2
), and leave the

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