SI4702-B16-GM Silicon Laboratories Inc, SI4702-B16-GM Datasheet - Page 30

• Manufacturer Part Number: SI4702-B16-GM
• Description: IC FM RADIO TUNER 20QFN
• Manufacturer: Silicon Laboratories Inc

Specifications of SI4702-B16-GM

• Frequency: 76MHz ~ 108MHz
• Sensitivity: -99dBm
• Modulation Or Protocol: FM
• Applications: Cellular, MP3, PDAs, Portable Radios
• Current - Receiving: 18mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 20-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Memory Size: -
• Data Rate - Maximum: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 336-1333-1

Si4702/03-C19
Register 07h. Test 1
Reset value = 0x0100
30
Name XOSCEN AHIZEN
Type
13:0
Bit
Bit
15
14
R/W
D15
XOSCEN
Reserved
AHIZEN
Name
D14
R/W
Crystal Oscillator Enable.
0 = Disable (default).
1 = Enable.
The internal crystal oscillator requires an external 32.768 kHz crystal as shown in
2. "Typical Application Schematic" on page 14. The oscillator must be enabled before
powerup (ENABLE = 1) as shown in Figure 9, “Initialization Sequence,” on page 21. It
should only be disabled after powerdown (ENABLE = 0). Bits 13:0 of register 07h
must be preserved as 0x0100 while in powerdown and as 0x3C04 while in powerup.
Refer to Si4702/03 Internal Crystal Oscillator Errata.
Audio High-Z Enable.
0 = Disable (default).
1 = Enable.
Setting AHIZEN maintains a dc bias of 0.5 x V
vent the ESD diodes from clamping to the V
swing of another device. Register 07h containing the AHIZEN bit must not be written
during the powerup sequence and high-Z only takes effect when in powerdown and
V
erdown and as 0x3C04 while in powerup.
Reserved.
If written, these bits should be read first and then written with their pre-existing val-
ues. Do not write during powerup.
IO
D13
is supplied. Bits 13:0 of register 07h must be preserved as 0x0100 while in pow-
D12
D11 D10
Rev. 1.1
D9
D8
Function
Reserved
D7
R/W
IO
IO
or GND rail in response to the output
D6
on the LOUT and ROUT pins to pre-
D5
D4
D3
D2
D1
D0