XRT75R03IVTR-F Exar Corporation, XRT75R03IVTR-F Datasheet - Page 4

• Manufacturer Part Number: XRT75R03IVTR-F
• Description: IC LIU E3/DS3/STS-1 3CH 128LQFP
• Manufacturer: Exar Corporation

Specifications of XRT75R03IVTR-F

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

XRT75R03
REV. 1.0.8
GENERAL DESCRIPTION .................................................................................................1
FEATURES .........................................................................................................................1
PIN DESCRIPTIONS (BY FUNCTION) ..............................................................................4
1.0 R3 TECHNOLOGY (RECONFIGURABLE, RELAYLESS REDUNDANCY) ........................................29
2.0 ELECTRICAL CHARACTERISTICS ....................................................................................................30
3.0 TIMING CHARACTERISTICS ..............................................................................................................31
4.0 LINE SIDE CHARACTERISTICS: ........................................................................................................33
FUNCTIONAL DESCRIPTION: ........................................................................................40
5.0 THE TRANSMITTER SECTION: ..........................................................................................................40
A
T
R
S
T
S
R
G
C
J
P
XRT75R03 P
ITTER
RANSMIT
RANSMIT
PPLICATIONS
ECEIVE
ORDERING INFORMATION.....................................................................................................................3
YSTEM
YSTEM
ECEIVE
ONTROL AND
OWER
1.1 NETWORK ARCHITECTURE ......................................................................................................................... 29
1.2 POWER FAILURE PROTECTION .................................................................................................................. 29
1.3 SOFTWARE VS HARDWARE AUTOMATIC PROTECTION SWITCHING ................................................... 29
4.1 E3 LINE SIDE PARAMETERS: ...................................................................................................................... 33
5.1 TRANSMIT CLOCK: ....................................................................................................................................... 41
5.2 B3ZS/HDB3 ENCODER: ................................................................................................................................. 41
5.3 TRANSMIT PULSE SHAPER: ........................................................................................................................ 42
5.4 TRANSMIT DRIVE MONITOR: ....................................................................................................................... 43
5.5 TRANSMITTER SECTION ON/OFF: .............................................................................................................. 43
ENERAL
F
F
F
T
T
F
F
F
F
F
T
F
T
T
F
T
T
F
F
T
F
F
F
F
F
IGURE
IGURE
IGURE
ABLE
ABLE
IGURE
IGURE
IGURE
IGURE
IGURE
ABLE
IGURE
ABLE
ABLE
IGURE
ABLE
ABLE
IGURE
IGURE
ABLE
IGURE
IGURE
IGURE
IGURE
IGURE
5.2.1 B3ZS ENCODING: ...................................................................................................................................................... 41
5.2.2 HDB3 ENCODING:...................................................................................................................................................... 41
5.3.1 GUIDELINES FOR USING TRANSMIT BUILD OUT CIRCUIT: ................................................................................. 42
5.3.2 INTERFACING TO THE LINE: .................................................................................................................................... 42
A
-S
-S
S
TTENUATOR INTERFACE
1: A
2: DC E
3: E3 T
4: STS-1 P
5: STS-1 T
6: DS3 P
7: DS3 T
8: M
I
L
UPPLY AND
1. B
2. P
3. N
4. T
5. T
6. R
7. T
8. P
9. B
10. T
11. M
12. T
13. S
14. D
15. B3ZS E
16. HDB3 E
17. T
NTERFACE
C
IDE
IDE
I
L
INE
NTERFACE
ONTROL
INE
BSOLUTE
ICROPROCESSOR
YPICAL INTERFACE BETWEEN TERMINAL EQUIPMENT AND THE
RANSMITTER
RANSMIT
LOCK
IN
ETWORK
ECEIVER
ULSE
ELLCORE
IN
................................................................................................................................................1
T
R
S
RANSMIT
IMING
RANSMIT
A
INGLE
UAL
ICROPROCESSOR
RANSMITTER LINE SIDE OUTPUT AND RECEIVER LINE SIDE INPUT SPECIFICATIONS
RANSMIT
S
O
ECEIVE
IDE
LECTRICAL
LARM
L
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
RANSMITTER
ULSE
UT OF THE
IDE
ISTING IN
-R
M
D
ULSE
RANSMITTER
-R
D
IAGRAM OF THE
P
ASK FOR
AIL
NCODING
P
M
NCODING
C
R
D
P
IAGRAM FOR THE
P
G
INS
GR-253 CORE T
AIL OR
M
INS
AXIMUM
O
D
C
ULSE
I
EDUNDANCY
ATA OUTPUT AND CODE VIOLATION TIMING
HARACTERISTICS
INS
D
NTERFACE
ROUND
ASK
M
RIVER
O
UPUT
HARACTERISTICS
T
ATA
..............................................................................................................................17
I
ASK
C
ERMINAL
UTPUT AND
.............................................................................................................................18
NPUT AND
XRT75R03 ........................................................................................................................................... 3
..............................................................................................................................8
HARACTERISTICS
A
E
NRZ D
E3 (34.368
S
N
L
F
F
QUATIONS
MPLITUDE TEST CIRCUIT FOR
F
P
E
INE
ERIAL
R
M
ORMAT
ORMAT
UMERICAL
L
S
ORMAT
ULSE
QUATIONS
ATINGS
INE
ONITOR SET
ERIAL
P
S
...................................................................................................................20
INS
XRT 75R03.............................................................................................................................. 2
I
A
IDE
ATA
NPUT
S
.................................................................................................................20
I
RCHITECTURE
T
NTERFACE
IDE
(
........................................................................................................................................... 41
M
EMPLATE FOR
.......................................................................................................................................... 41
I
ENCODER AND DECODER ARE DISABLED
RANSMIT
......................................................................................................................................... 30
O
NTERFACE
.............................................................................................................22
T
........................................................................................................................................ 37
F
ICROPROCESSOR
MBITS
R
UTPUT AND
ORMAT
RANSMIT
O
T
..................................................................................................................................... 35
ECEIVE
IMING
UTPUT AND
..........................................................................................................2
O
: ................................................................................................................................ 30
-
UP
........................................................................................................2
RDER
/
S
. ........................................................................................................................... 43
T
)
O
(E
.......................................................................................................................... 31
IMINGS
INTERFACE AS PER ITU
UTPUT
S
NCODER AND
...................................................................................................................... 29
TRUCTURE
C
DS3
R
C
............................................................................................24
ECEIVER
ONTROL
R
ONTROL
ECEIVER
( TA = 250C, VDD=3.3V± 5%
P
S
AS PER
E3, DS3
ULSE
ERIAL
...................................................................................................... 38
I
L
................................................................................................... 32
T
INE
D
P
I
L
P
B
EMPLATE FOR
NTERFACE
ECODER ARE
INE
INS
ELLCORE
INS
AND
S
IDE
S
......................................................................10
XRT75R03 (
-
IDE
.......................................................................4
STS-1 R
T
I
G.703......................................................................... 33
NPUT
I
GR-499 ................................................................... 37
NPUT
................................................................................ 39
) ............................................................................. 40
E
SONET STS-1 A
S
NABLED
ATES
PECIFICATIONS
S
PECIFICATIONS
DUAL
................................................................. 32
AND LOAD
)............................................................ 40
-
RAIL DATA
........................................................ 34
(GR-499) ................................. 38
PPLICATIONS
= 10
(GR-253) .............................. 36
) .......................................... 31
P
F) .................................. 39
............................. 35
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